搜索资源列表
PCI_144
- -- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library --- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library
Altera的IP源码8237
- 名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写，能被keilC51支持-renowned name of the company Synopsys 8051IP Core VHDL language, support can be keilC51
Lab11
- 32bits FIFO with synchronizer. pass the synthesis using Synopsys tools-bits FIFO with synchronizer. Pass the sy nthesis using Synopsys tools
DesignCompilerFAQ
- synopsys DC FRQ 最流行的综合工具
RTL-Implementation-Guide
- 想做一个合格的ic工程师么？这个文档告诉你怎样写高质量的rtl代码。这是SYNOPSYS注册用户才可下载的文档
佰思科技(Bicesoft.com)第四版
- 佰思科技(Bicesoft.com)第四版-632 Synopsys (Bicesoft.com) fourth
cla_dc
- a demo scr ipt of \"carry lookahead adder\" for synopsys design compiler
Synopsys-RTLSystemC
- synopsys的systemc和RTl书籍清晰电子版，专业权威的EDA公司的培训资料-synopsys of systemc and RTl clear electronic version of books, professional authority of the EDA company' s training materials
ASIC-SYNOPSYS
- 芯片设计综合经典书籍 design compiler primetime-asic synthesys
DClicense_Install_crack_tool
- synopsys 公司Design compiler的安装步骤及license生成工具-Installation of the Design compiler,Synopsys and the neccesary tools for license crack and generate
RTL-to-Gates-Synthesis-using-Synopsys-Design-Comp
- RTL-to-Gates Synthesis using Synopsys Design Compiler.rar
ASGN-1-2a3.tar
- VHDL MODELSIM FUNCTIONAL SIMULATION AND SYNTHSIS USING SYNOPSYS DESIGN COMPILER
Synopsys-tools-intruction
- synopsys的主要的工具介绍，包括DC,PT,Formality等，对于初学IC设计者了解设计工具有很大帮助。-synopsys of the main tools for presentations, including DC, PT, Formality, etc., for the beginner tool for IC designers to understand the design of much help.
ASIC-Design-With-Synopsys
- ASIC Design With Synopsys
synopsys-dw-mshc
- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
fifo
- 基于verilog HDL的fifo设计与测试，包含设计与测试代码，以及简单的makefile编写。整个平台是基于linux操作，仿真平台是基于SYNOPSYS的vcs工具。(Based on verilog HDL fifo design and testing, including the design and test code, and simple makefile.The platform is based on Linux operating, the simulation pla
Synopsys_Sentaurus_Process_Diode.tar
- Synopsys Sentaurus Process Diode model
Or1200_cpu_scripts
- OpenRisc Synopsys Synthesis
or1200_DCReportsAndScripts.tar
- OpenRisc Synopsys Reports and scr ipts
Synopsys SCL 10.9.3
- 后端综合软件design compiler将verilog源码，RTL文件转变成电路并实施优化