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实现USB接口功能的VHDL和verilog完整源代码
- 实现USB接口功能的VHDL和verilog完整源代码,Implementation USB interface functions of the VHDL and Verilog source code integrity
USB.rar
- 用VHDL实现的USB IP核，大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
GPIF_fifo
- EZ USB GPIF的控制器的源代码，已经调试通过-EZ USB GPIF the source code of the controller has passed testing
6713_FPGA
- DSP+FPGA+USB2.0板子电路图 DSP是6713；FPGA是XilinxXC2S200；USB芯片是CY68013A-128AXC-DSP+ FPGA+ USB2.0 circuit board DSP is 6713 FPGA is XilinxXC2S200 USB chip is CY68013A-128AXC
FT2232H_USB_Core
- 在FPGA外扩用FT2232 实现UART TO USB 2.0 的通信。-The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style synchronous FIFO mode. Data rates up to 25 mbytes/s can be achieve
rwma
- 3G中FP协议的DCH和RACH解码,写相应代码的可以做下参考,还是很有用的！()