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状态机
- 简单的状态机,按下按钮可在4个状态间进行切换(simple state machine)
jiaotongdeng
- 基于VHDL状态机的交通灯设计(已仿真下载实验板测试)(Traffic light design based on VHDL state machine (simulation download, experimental board test))
C language state machine
- C语言状态机 用状态机原理进行软件设计 摘要:本文描述状态机基础理论,以及运用状态机原理进行软件设计和实现的方法。 关键词:有限状态机 层次状态机 面向对象分析 行为继承(C language state machine)
Microsoft.Activities.StateMachine
- 使用window状态机实现简单的请假审批流程(Use state machine to achieve approval process)
一段式有限状态机
- 通过找hello结束后,控制led的翻转(After you look for Hello, control the LED flip)
design
- 使用有限状态机完成序列检测,是FPGA开发中的基础程序(sequence detection with state mation)
state_machine
- 同样是简单的MAX II编程,状态机顾名思义,0到8的循环显示,用到了数码管。(The same is a simple MAX II programming, the state machine as its name suggests, 0 to 8 of the cycle display, using the digital tube.)
Mealy_TrafficLight
- 基于FPGA交通控制器的Mealy状态机实现(Mealy state machine controller based on FPGA traffic)
simple state machine
- 使用labview开发环境,对经典状态机功能完成实现(simple state machine)
FiniteStateMachine
- 一个可以识别正则表达式的状态机,采用了多种Case描述,方便修改(A finite state machine designed for identifying expression patterns)
4
- 设计一个轨道交通自动售票电路,只接受1,2,5元人民币,每张票价定额5元,并支持找零。要求: (1)用状态机方法设计;(Design an automatic rail transit ticketing circuit, accepting only 1, 2, 5 yuan, 5 yuan per ticket, and support change. Requirements: (1) design with state machine method;)
状态机
- 设计一个简单的数字电路用于电子卖报机,要求如下: 报纸价格为1.5元;投币器只接受5角和1元硬币;投币器不找零。当投入金额合适时,报纸出口打开,否则关闭。用Verilog完成设计。(The design of a simple digital circuit for electronic selling machine, the following: The price is 1.5 yuan; the coin only accept 5 cents and $1 coin coin do
fsm3
- verilog状态机实验,说明一个状态机的生成过程(Verilog state machine experiment, which illustrates the generation process of a state machine)
state
- 简单的状态机,有8个状态,数码管输出当前状态的编号(A simple state machine, there are eight state, digital tube output the serial number of the current state)
qpc4.0.00
- 本文档是UML事件驱动状态机介绍文档,基于量子编程的qp状态机,qpc4.0.00.zip是源代码。可以使用它来取代RTOS和前后台系统。实时性完全可以和RTOS媲美。了解它之后肯定会对你的编程思想有很大启发。了解过cc2530 z-stack协议栈的人看到它会非常亲切,因为z-stack协议栈和qp非常类似(This document is an introduction to a UML event driven state machine, a QP state machine based
testSta状态机对应代码
- 有限状态机又称有限状态自动机,简称状态机,是表示有限个状态以及在这些状态之间的转移和动作等行为的数学模型。它反映从系统开始到现在时刻的输入变化,转移指示状态变更,并且用必须满足来确使转移发生的条件来描述它;动作是在给定时刻要进行的活动的描述。(Establish basic finite state machine)
interfaceswitch
- ARDUINO硬件台平的界面跳转库(C++类库)。可用于界面设计;菜单设计;状态机管理等。提供详细说明与例程。可用PROTEUS仿真+VDSM脱离硬件查看效果。(ARDUINO hardware platform flat interface jump Library (C++ Class Library). It can be used for interface design, menu design, state machine management and so on. Provide
UART发送接收奇偶校验
- 状态机,串口收发,以及奇偶校验。 even_parity.v奇偶校验; receive_byte.v字节接收; send_byte.v字节发送(state machine,UART even_parity.v even parity; receive_byte.v receiving byte; send_byte.v sending byte)
key
- 矩阵按键识别,状态机实现,很好的参考资料(Matrix key identification, state machine implementation, good reference data)
ztj
- 底层基本逻辑单元实现状态机的功能,根据不同的控制位实现状态转化(Basic logic unit realizes state machine function and realizes state transformation according to different control bits)