搜索资源列表
costas8
- 用软件锁相环解调QPSK的simulink仿真,希望有帮助-software PLL QPSK demodulator the simulink, with the hope of helping
grew
- 为了测量 DVD的Jitter ,需要知道刻录时钟。针对 DVD 特殊的数据格式 NRZI,提出一个专用的时钟恢复系 统 ,用于从读出的 RF信号中恢复写时钟。这个系统采用基于锁相环的双环结构。介绍系统结构、各个模块的构成原理、数 学模型 ,并结合 Simulink 给出仿真结果。理论和实验证明 ,该系统既可作为测量 DVD Jitter 的硬件电路设计的参考 ,也可作 为软件设计的工具。-DVD to the Jitter measurement, the burning need
Phase_Locked_Loop
- 对一般的PLL及APLL,定点PLL进行了MATLAB SIMULINK仿真，可以由程序直接生成PLL的VHDL和C源代码
simulink_labs
- This project allows you to learn communication systems in greater depth. It contains the Simulink files (*.mdl) which are block design files of various communication systems such as AM, DSB-SC, FM, PLL, Data Acquisition, Digital Data Transmission, PC
PLLL
- Its a PLL in simulink.
simple_pll_3
- simulink自制锁相环。。。。。包括一些简洁结构-PLL simulink made. . . . .
PLL
- matlab-simulink的锁相环模型-pll model
pll
- 基于simulink的频率合成器实现，可实现小数分频-Simulink-based frequency synthesizer implemented to achieve fractional
pll
- 关于pll的simulink模型，希望对大家有用。-a module of pll by using simulink.hope it be helpful
PLL
- 基于simulink的三相PLL锁相环仿真,可以直接使用-Three phase PLL phase lock simuliation，it can be used directly
pll
- introduce simulink pll matlab
SinglePhaseLockLoop
- single phase voltage PLL,simulink simulation model
PLL
- 自己用MATLAB/Simulink搭的三相电压锁相环模块，输出幅值相位和频率-Use their own MATLAB/Simulink take the three-phase voltage phase-locked loop module, the output amplitude phase and frequency
LAB8_13
- 利用MATLAB Simulink內建Model，模擬一階鎖相迴路系統(Analog first-order PLL system)
PLL_simulink
- pll锁相环simulink模型，通俗易懂，可以实现的模型(Pll phase locked loop simulink model, easy to understand, can achieve the model)
one_phause_pll
- 描述： 单相锁相环仿真模型，适用于想了解PLL的同学。(a Phase Lock Loop (PLL) closed-loop control system, which tracks the frequency and phase of a sinusoidal signal by using an internal frequency oscillator. The control system adjusts the internal oscillator frequency to ke
系统仿真程序代码
- 通信系统建模与仿真实例分析 simulink 原码(Matlab/simulink PLL/ADC model)
SPLL
- 采用spll控制结构，simulink 仿真结果正确 dq变换(SPLL control structure is adopted, Simulink simulation result is correct, dq transform.)
PhaseLockedLoop
- matlab下设计的pll锁相环，适用于电网电压锁相，不平衡锁相效果还没测试(pll phase lock with matlab simulink, haven't been tested for unbalanced situation)