搜索资源列表
DSP-Builder-Technology
- DSP Builder Technology,关于FPGA的DSP设计指导,非常的不错!-DSP Builder Technology
Digital-Signal-Processing-with-FPGA
- FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
DSP-External-Memory-Interface-Module
- EMIF是DSP嵌入式系统中重要的外扩接口，往往连接大容量/高速存储器、并行AD/DA、外扩特殊功能芯片，甚至连接FPGA或者ASIC。-EMIF is a DSP embedded system is an important external expansion interface, often connect large-capacity/high-speed memory, parallel AD/DA, outside the extended special function chi
FPGA-dsp-motor-control
- 基于FPGA的LAMOST多电机控制驱动系统-Based on the FPGA LAMOST motor control and drive system
dsp-presentation
- xilinx提供的用于数字信号处理开发的FPGA资料。-xilinx FPGA DSP
dsp-with-FPGA--verilog_code
- FPGA DSP算法实现代码，做FPGA的非常值得看一看。-dsp with FPGA verilog code
FPGA-DSP
- FPGA数字信号处理实现原理及方法的例程-FPGA digital signal processing principle and method routines
数字信号处理的FPGA实现-第三版-verilog源程序
- 数字信号处理的FPGA实现, 包括了FPGA基础知识，浮点运算，信号处理的FIR FFT等，附录包含源代码(Digital signal processing FPGA implementation, including the basic knowledge of FPGA, floating point operations, signal processing FIR, FFT, etc., the appendix contains the source code)
DSP读写基于FPGA的FIFO
- 本文档提供了DSP对FPGA中的FIFO的读写时序以及编程思路，供大家参考。(This document provides DSP on the FPGA FIFO read and write timing and programming ideas for your reference.)
fpga
- pid算法控制电机运动，实现fpga与dsp的双口RAM通信(PID algorithm to control motor movement, the realization of FPGA and DSP dual port RAM communication)
Nimu_eth
- DSP的SRIO接口与FPGA通信,(DSP fpga DSP )
FPGA_ASIC-DSP和FPGA共用FLASH进行配置的方法
- 通过ASIC、DSP、CPU对FPGA进行配置(Through the ASIC, DSP and CPU on the FPGA configuration)
xapp502配置例程
- FPGA配置例程，VHDL语言，使用CPLD对FPGA进行配置(The FPGA configuration routine, VHDL language, using CPLD on the FPGA configuration)
ACC_CarryIn_CarryOut
- This module does Accumulate operation used in dsp. Tested on fpga.
ACCx42_AvalonST_Input
- This module does pipelined accumulate operation with 42 bit int value, usually used in dsp, Proved in Altera Stratix FPGA devices
Quadrature_MACx42_AvalonSt_Input v1.0
- This module does Complex MAC based on Altera Stratix 2 DSP Blocks.
DSP48E1_ComplexMul
- This module does Complex multiplication based on Xilinx DSP48E1 dsp block. Proved on xilinx Virtex 6 Devices
使用 EMIF 将 Xilinx FPGA 与 TI DSP 平台接口
- 使用 EMIF 将 Xilinx FPGA 与 TI DSP 平台接口(D:\bootstrap\ce8c548c2a73a823101bfd000ce9d9e3)
DSP+FPGA步进电机开发板资料
- DspMotor里是dsp步进驱动源码。环境 ccs3.3 ；.FpgaMotorControl是fpga光栅尺采集源码。环境 ISE10.1(DspMotor is the DSP stepping drive source. Environment CCS3.3;.FpgaMotorControl is the source of FPGA grating ruler. Environment ISE10.1)
ug331 Spartan-3 系列 FPGA 中文用户指南
- 官方手册ug331的中文版 本用户指南为客户使用 Spartan?-3 FPGA 系列各平台 （Spartan-3、Spartan-3E、 Spartan-3A、Spartan-3AN 和 Spartan-3A DSP FPGA 平台）的架构功能提供指导。本文 综合了各平台的技术文档，以便于了解其中异同，同时减少多种资料来源的内容重复。这些平台是新设计的补充解决方案。(ug331 Spartan-3 Generation FPGA User Guide)