搜索资源列表
8LED
- QuartusII平台下Verilog语言实现的8段LED显示程序-Verilog language QuartusII platform 8-segment LED display program
8th-floor-elevator-controller
- ALTERA DE2仿真板 quartusII集成开发环境 8楼电梯控制器-8th floor elevator controller
cshiyan2012
- 基于EDA软件平台上，用硬件描述语言verilog设计完成分频器、计数器、串行移位输出器、伪码发生器、QPSK I/Q调制器、QPSK I/Q解调器，基于选项法中频调制器，再将各个模块综合起来组成一个完整系统；并用quartusII软件对其进行仿真验证。-EDA software platform based on the hardware descr iption language verilog design complete shift of the frequency divider,
ESysDesign
- quartusII 调试，产生可调频率的正弦波、方波、三角波-quartusII process, output sin wave, square wave, triangular wave
simplepwm
- quartusII调试，简单的pwm信号输出，FPGA初学者入门程序，高手勿进-quartusII debugging, not into simple pwm signal output FPGA beginner program, master
signal_tap
- 对学习quartusii有很大的帮助，对逻辑分析仪的使用有更多的掌握-A great help for learning quartusii more mastery of the use of logic analyzer
PS2_Verilog
- QuartusII下基于Verilog的PS2接口设计和说明文档-QuartusII PS2 interface design based on Verilog and documentation
With-asynchronous-reset-is-enabled
- 在QuartusII上对例2-1进行编辑、编译、综合、适配、仿真。说明例中各语句的作用，详细描述示例的功能特点，给出其所有信号的时序仿真波形。-With asynchronous reset and four addition counter synchronization is enabled
LAB-16
- 用FPGA实现的性线反馈移位寄存器（LFSR）设计。整个工程在quartusII环境下，用verilog编程。-FPGA implementation of the line feedback shift register (LFSR) design. The whole project in verilog programming the quartusII environment.
QuartusII-errors-analysis
- Qartus中经常会出现警告和报错，此文档用来分析一些常有的错误。-The often appear Qartus warning and error, this document is used to analyze some of the common errors.
fft_8
- 基于quartusiI的8位傅立叶变换。verlog程序加仿真。-Based quartusiI eight Fourier transform. verlog program plus simulation.
tt_qsys_design
- Altera Qsys设计实例，软件需要QuartusII 11.0以上版本-Qsys Tutorial Design Example
fft_1024
- 1024点FFT处理器，能通过quartusII验证通过-1024 point fft code,can pass the test of the software quartusII
FPGA-DDS
- 基于FPGA的DDS实现QuartusII工程和论文-Based on the FPGA DDS QuartusII project and paper
8051_IP_DOC
- K8051单片机是以由VQM原码（Verilog Quartus Mapping File）表达的，在QuartusII环境下能与VHDL、Verilog等其他硬件描述语言混合编译综合，并在单片FPGA中实现全部硬件系统，并完成软件调试。-K8051 microcontroller in by the the VQM original code (Verilog Quartus Mapping File) expression, can under in QuartusII environmen
QuartusII--installed-r
- Quartus2 的安装和使用-Quartus2 install and use. . . . . . . . . . . .
I2C_EEPROM
- 1. 本测试是夏宇闻 verilog数字系统设计教程，中的例程。 2. 编译环境Quartusii 3. 仿真环境Modelsim se 6.5d 4. 可综合部分已经经过quartus 验证正确 5. 仿真部分通过将I2C模块与一个EEPROM模型组合，通过时序仿真-EEPROM_I2C Verilog
DZ07E1_08Z_LCQ
- 基于FPGA的交通控制器，在QuartusII+VHDL-FPGA-based traffic controller
pj
- 带有进位位的加法器、用vhdl语言编写。已通过quartusII编译-With the carry bit adder
UART
- 本论文使用Verilog HDL 语言描述硬件功能，利用QuartusII 5.0在 FPGA 芯片上的综合描述,采用模块化设计方法设计UART（通用异步收发器）的各个模块。-The paper using Verilog HDL language to describe hardware features, the use of the FPGA chip QuartusII 5.0 comprehensive descr iption of the modular design approa