搜索资源列表
video_formatter
- 数字video BT601格式转换成BT656/SMPTE格式-Digital video BT.601 format converts to BT656 format or SMPTE format.
V4_SI
- 针对FPGA设计的信号完整性分析,以及设计指导,网页视频和音频,识货的下-FPGA design for signal integrity analysis, and design guidelines, web video and audio,识货next
video
- vga controller 設計資料,非常基礎且實用-vga controller design information, and is based on practical
fj
- 从视频信号中分离出场同步、行同步、场消隐、行消隐等同步信号,用VHDL实现。-Separated from the video signal played simultaneously, line synchronization, field blanking, line blanking and other synchronous signals, using VHDL implementation.
Form1
- “文字格式”工具栏 “文字格式”工具栏- Visual Basic(7880) Visual C++(306) VBscr ipt(76) Others(73) WINDOWS(55) VBA(48) C-C++(42) MultiPlatform(39) ASP(38) Delphi(34) Java(30) CSharp(29) SQL(22) C++ Builder(22) Windows_Unix(20) CHM(16) WORD(14) C++(14) DOS(13) PDF(11
Bssppartan3a
- 一种基于xilinx公司的FPGA开发板spartan3的一个用键盘控制制vga输出的vhdl源代码程序源码,能实现高清晰的视频输出. -Based xilinx company FPGA development board spartan3 of a keyboard control system vga output vhdl source code program source code, can achieve high-definition video output.
VHDL_Complacated_divider_multiplier_technic
- Described as a way difficult to express in the language VHDL complicated point calculation method can be easily expressed in a FPGA-based 2 n wins to reference video signal YCbCr to RGB conversion will be created. This material has a lot of technic
dianzhenhanzi
- 用VHDL语言实现汉字点阵的动态循环显示,同时有视频可以教大家使用MAXPLUSII。-Implemented in VHDL language character dot-matrix display dynamic cycle, while the video can teach you to use MAXPLUSII.
VGAbars_1016
- Generates video bars for NTSC/PAL in VHDL
1位数码管动态显示_QII视频讲解
- 数码管VHDL视频讲解,详细讲述了使用VHDL语言写的数码管程序(Digital tube VHDL video explanation, detailing the use of VHDL language written in digital tube procedures)
频率计数码管显示_QII视频讲解
- 频率计数码管显示_QII视频讲解 用VHDL语言写的频率计(Frequency meter, digital display, _QII video explanation, written in VHDL language frequency meter)
简单状态机控制步进电机_QII视频讲解
- 简单状态机控制步进电机_QII视频讲解 详细介绍用VHDL控制步进电机(Simple state control stepper motor, _QII video, explain in detail, with VHDL stepper motor control)
pid-fpga-vhdl-master
- 6. Show how accurate your predicted model is, also explain in what situation and why it does (not) perform that well (in report and video). 7. If you re-train the network for your own custom images, you can choose different training options. Explain