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EP1C3_12_7_SPCTR
- 基于FPGA的信号采集及频谱分析，用VHDL编写，压缩包里是Quartus下的工程。AD采样用状态机实现，并存入LPM_RAM。设计了一个UART模块（也是状态机实现的），可将数据发到ＰＣ机上。-FPGA-based signal acquisition and spectral analysis, prepared with VHDL, Quartus compression bag is the next project. AD sampling state machine used to
viterbi213
- 编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现，包含整个QuartusＩＩ的工程文件，解码方式为寄存器交换法-Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange
FPGA_Project1
- 利用VHDL语言编写的FPGA工程文件，包含原理图和各个模块-FPGA using VHDL language project files, including schematics and each module
project
- 睿行fpga开发板配套例程，verilog版本-ruixing fpga vhdl example
ppm
- 使用fpga达成的最短脉冲检测、窄脉冲成型模块程序，语言为vhdl，可用于ppm调制与解调项目设计(The program of the shortest pulse detection based on FPGA is VHDL, which can be used in PPM modulation and demodulation project design)