搜索资源列表
INOUT.DLL
- 用C++编写WINDOWS下端口操作动态链接库INOUT.DLL,用C++编写WINDOWS下端口操作动态链接库INOUT.D-With C++ Prepared WINDOWS port operation under dynamic link library INOUT.DLL, using C++ Prepared WINDOWS port operation under dynamic link library INOUT.D
inout
- 第一个为输入5个整数,输出vec1中的元素值;输入3个字符,输出vec2中的元素值。第二个为输入若干个整数,以非整数结束并输出-The first five integers as input and output elements vec1 value enter the three characters, the output value vec2 elements. The second for the importation of a number of integers, and t
files-inout
- 实现C++文件输入输出操作,以类为基础进行输入输出流的演示-Implementation C++ file input and output operations, to category-based input and output stream demo
inout
- 在VB中调用IO的方法主要的程序遗迹显示的内容-IO in VB to call the main method of the procedure shows the contents of relics and so on
vb6-src
- Parallel Port Monitoring being enabled with the VB Program with help of InOut dll .
TOPDOWN
- top down parsing which is a simulation of predictive parser which checks the inout for a given string is acceptable or not
inout
- 用C++语言实现输入一整形数字,并原样回显在屏幕上-Using C++ language input for a plastic figure, and stood back was on the screen
InOut
- Travelling salesman problem
inout
- 利用链表实现,文本文件和二进制文件的输入输出-Using linked list implementation, text files and binary file input and output
inout
- 潮流计算,开始的初始化,各种定义啥的,你懂的。-Flow calculation, the beginning of initialization, various definitions Han' s, you know.
inout_test
- verilog inout端口的测试程序 帮助理解Verilog语言inout端口的使用(包括Verilog程序和testbench)-verilog inout port test program to help understand the use of the Verilog language inout port
STC89C51RC-(INOUT)
- STC89C52 单片机,传感器输入,继电器输出,控制程序,带仿真程序!-STC89C52 microcontroller, sensor input, relay output, control procedures, with emulator!
inout
- 运动控制卡的输入输出检测,各种输入输出状态是否正确 -Input and output to detect motion control card, a variety of input and output status is correct
inout
- 第一个为输入5个整数,输出vec1中的元素值;输入3个字符,输出vec2中的元素值。第二个为输入若干个整数,以非整数结束并输出-The first five integers as input and output elements vec1 value enter the three characters, the output value vec2 elements. The second for the importation of a number of integers, and t
11_sdram_test
- module sdram_test( input clk_50m, input reset_n, //sdram control output S_CLK, //sdram clock output S_CKE, //sdram clock enable output S_NCS, //sdram chip select output S_NWE, //sdram write enable output S_NC
