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CLOCK
- 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
software_72nios
- 这是Nios II 7.2 IDE中的工程模板，在8.0中有些没有，在此列出来，希望方便大家-This is the Nios II 7.2 IDE projects template, in 8.0, some not, in this list, I hope to facilitate
DSO_Project
- 基于NIOS软核的示波器实现 硬件为ALTERA的飓风2待-DSO_Project for NIOSII
led
- 基于vhdl的led内核程序，用nios 2编写，有助于nios内核的学习-Use nios based vhdl led kernels procedures written to help nios kernel learning
ps2keyboard
- 基于vhdl的键盘内核程序，用nios 2编写，有助于nios内核的学习-Use nios vhdl keyboard kernel procedures written to help nios kernel learning
ps2mouse
- 基于vhdl的ps2鼠标内核程序，用nios 2编写，有助于nios内核的学习-Nios 2 write vhdl ps2 mouse kernel program, help nios kernel learning
avalon_pwm
- 基于vhdl的pwm波产生内核程序，用nios 2编写，有助于nios内核的学习-Nios 2 write vhdl ps2 mouse kernel program, help nios kernel learning
seven_segdisp
- 基于vhdl的7段码显示内核程序，用nios 2编写，有助于nios的学习-Based vhdl 7 segment display kernel program nios 2 preparation help nios learning
tlc5620
- 基于vhdl的tlc5620内核程序，用nios 2编写，有助于nios的学习-Nios 2 based on the vhdl tlc5620 kernel procedures, preparation help nios learning
lcd_disp
- A VHDL source code for LCD Display for NIOS board. 2 line matrix LCD.
NIOSII_Qsys_EP4CE15_v1.1.2
- Quartus II11.0中，已使用Qsys代替SOPC Builder,是以后Nois开发的一个趋势-instead of SOPC Builder in Quartus II，It s important to Nios II
NiosBasico
- Altera FPGA NIOS-2 bacic VHDL
NiosBasico
- This is an example of VHDL program to exercise the NIOS-2 processor of Altera FPGA.