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DDS_VERILOG
- 本例给出了DDS的VERIOG的程序事例,可发生正弦\\余弦等波形,适应与通信方面的硬件实现!-the cases presented DDS VERIOG procedures example, can occur sine \\ cosine wave such as, Adaptation and communications hardware realization!
dds
- matlab下实现的DDS发生器,可观察其发生信号的波形,频谱。 运行前请先输入 global theta theta=0 -matlab implementation of the DDS generator, may happen to observe the signal waveform, spectrum. Please enter a pre-operational global theta theta = 0
DDS
- 基于DDS原理,利用VHDL语言进行正弦波、三角波、锯齿波、矩形波等波形的发生。包括完整代码和QUARTUS II工程。-Based on DDS principle, the use of VHDL, sine, triangle, sawtooth, square wave waveform occurs. Including the complete code and QUARTUS II project.