搜索资源列表
verilog for uart
- 通用异步接收器/发送器(UART)是能够编程以控制计算机到附加串行设备的接口的微芯片。详细来说,它提供给计算机RS-...还有高级的UART提供了一定数量的数据缓冲,这样计算机和串行设备数据流就可以保持同样的速度。-universal asynchronous receiver / transmitter (UART) can be programmed to control computer attached to the serial device interface microchips.
基于USB-ATA接口的海量存储器的设计与实现
- 介绍了一种基于通用可编程接口的通用串行总线-高级技术配件解决方案,将普通硬盘转化为Usb Mass Storage.-introduces a general programmable interface based on the Universal Serial Bus-senior technical accessories solution that will drive into ordinary Usb Mass Storage.
exercise3
- 用verilog实现dsp与Fpga接口的同步设计,其功能包括读写操作及四个功能模块,采用两个fifo实现不同时钟域的地址与数据的转换,在quartus ii11.0环境下运行,运行此程序之前需运行将调用fifo。-Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modul
6IIS.tar
- IIS接口的verilog代码,用verilog编写,片上系统SOC源代码分析的IIS接口代码,总线是wishbone-IIS interface verilog code
