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code.rar
- 使用状态机设计一个5位序列检测器。从一串二进制码中检测出一个已预置的5位二进制码,The use of state machines to design a sequence detector 5. From a string of binary code to detect a preset binary code of 5
IIR
- 利用dsp builder设计的IIR滤波器，已经验证完全可以使用，只需要把其中系数改变。内含VHDL代码-Design IIR filters by dsp builder have been verified , just change the coffetions including VHDL code.
FPGA_interleaver
- 这是一个基于FPGA的交织器的VHDL源代码-This is an FPGA-based interleaver of the VHDL source code for
Trafficlight
- 系统设置一个两位BCD码倒计时计数器（计数脉冲1HZ），用于记录各状态持续时间； 因为各状态持续时间不一致，所以上述计数器应置入不同的预置数； 倒计时计数值输出至二个数码管显示； 程序共设置4个进程： ① 进程P1、P2和P3构成两个带有预置数功能的十进制计数器，其中P1和P3分别为个位和十位计数器，P2产生个位向十位的进位信号； ② P4是状态寄存器，控制状态的转换，并输出6盏交通灯的控制信号。-System to set up a two BCD code c
codeloc1k
- 实现电子密码锁的各项功能,经过编译和仿真-Electronic code lock of the function, the compiler and simulation
bxfsq
- 波形发生器的代码，具有产生正弦波、方波、三角波的功能。-Waveform Generator code has generated sine wave, square, triangle-wave function.
ARM7_HDL
- ARM7 verilog vhdl code
testbench
- ddr sdram controller datd module source code
vhdl
- usb rtl code, to fpga or asic
fir_16
- vhdl代码 实现16阶fir滤波器，可以仿真通过-vhdl code fir filter stage 16 can be adopted simulation
55593379usb(FPGA)
- this a vhdl code for a bus-this is a vhdl code for a bus
proiect
- VHDL CODE FOR MULTY CYCLE
i2c.tar
- I2C verilog HDL code including test environment
FFT1024
- System generator code for fft implementation. Pls enjoy it
code
- This code for ASCII ALTERA
oscillograph
- 这个代码是用于，数字示波器的设计，可以实现信号的实时采样与存储，还有DA转换-This code is used, the digital oscilloscope is designed to achieve real-time signal sampling and storage, as well as DA conversion. . .
adc0809dac0832control
- adc0809和dac的共同使用（verilog代码），虽然功能简单，但内容全面，新手原创，共同学习-adc0809 and dac common use (verilog code), although the function of simple, but comprehensive, new original, the common learning
MANIK
- MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed below. Features Hardware Features • Data Path Width 32 bits, with Four stage pipeline. • Mixed 16/32 bit instructions for code density ̶
IIr
- 十阶巴特沃斯低通滤波器设计（应用时域交叉原理编写的VHDL代码）-10-order Butterworth low pass filter design (application of principles of time-domain cross-written VHDL code)
VHDL-Code-for-8-bit-Floating-Point-Multiplication
- VHDL Code for 8 bit Floating Point Multiplication