VHDL IP Stack: This IP stack for an FPGA is a complex design because of the number of layers and the complexity of each that is required. It is limited to 10Mb/s operation and is designed for a full duplex switched network. It implements the lower la

复杂网络拓扑生存算法，对可能出现的拓扑不连通的状况进行了考虑，并支持网络拓扑的动态变化-Survival of a complex network topology algorithm, consider the situation that may appear disconnected topology and supports dynamic changes in the network topology