搜索资源列表
USB2.0_rtl_ipcore_verilog
- 经过门级网单验证的USB2.0 IP核 RTL代码-net after gate-level verification of USB IP Core RTL code
isp1362_g
- 网上收集的利用nios软核，使用isp1362芯片开发的u盘程序，有助于usb开发的理解和ufi协议的理解。已经验证，完全可用xp自带驱动。
AppNote_USBtoRS232
- AppNote_USBtoRS232 软核USB的说明-Application note for USBtoRS232, statement for soft core USB.
USBipcore
- usb1.1 ip核，使用verilog编写-usb1.1 ip nuclear, prepared using the Verilog
ISP1362-IP
- ISP1362的IP核用在USB 控制上可与PC通讯，作为SOPC的IP核-ISP1362' s USB IP core used in the control of communication with PC as the IP core SOPC
FS2410_APP
- 优龙FS2410开发板（ARM920T核）非操作系统下的外围硬件测试程序，包括音频、LCD、LED、蜂鸣器、按键、串口、网口、USB等测试程序。-EURONAVY FS2410 Development Board (ARM920T core) non-peripheral hardware, operating system testing procedures, including audio, LCD, LED, buzzer, keypad, serial port, network po
USB-1.1-IP-CORE-VHDL
- USB1.1标准接口的IP核的实现和其设计实现的源码范例VHDL-USB1.1 standard interface IP core implementations and examples of their design and implementation of the VHDL source code
USB-IPcore-Verilog
- USB IP 核设计，Verilog，ISE工程可以打开-USB IP core design, Verilog, ISE project can be opened