搜索资源列表
ViterbiK7_simulator
- viterbi 约束长度为7的仿真,适用于DAB等卷积编码译码的仿真
bianmaqi
- 一个完整的viterbi(2,1,7)编码程序,使用的是Verilog语言
VITERBI_C_3[1].0.1
- This package provides encoders and fast Viterbi decoders for the NASA standard rate 1/2 and rate 1/3 constraint length 7 convolutional codes. -This package provides encoders and fast Viterbi decoders for the NASAstandard rate 1/2 and rate 1/3 con
OFDMsoftdecoding
- OFDM系统,有(2,1,7)卷积码编码,分组交织,viterbi译码-OFDM system, there are (2,1,7) convolutional code encoding, packet intertwined, viterbi decoding
Viterbi_Implementation
- Viterbi Implementation for [7,5],[7,6] and [23,35] rate 1/2 convolutional code
computingBERConvolutionalCod3
- scr ipt for computing BER with Binary Convolutional Code and Viterbi decoding. Convolutional code of Rate-1/2, Generator polynomial - [7,5] octal Hard decision and soft decison decoding is used. -scr ipt for computing BER with Binary Convolu
computingBERConvolutionalCod2
- scr ipt for computing BER with Binary Convolutional Code and Viterbi decoding with finite survivor state memory Convolutional code of Rate-1/2, Generator polynomial - [7,5] octal Hard decision and soft decison decoding is used.
viterbi-3.0.1
- C语言实现的(1,3,7)viterbi译码器-(1,3,7)viterbi decoder in C
viterbi-3.0.1
- Package viterbi-3.0.1.tar contains programs to implement Viterbi decoding of (de-facto standard) rate-1/2 and rate-1/3 m=7 convolutional codes. Package simd-viterbi-2.0.1.tar contains programs to implement Viterbi decoders for r=1/2 k=7 and k=9 codes
vertibi
- (2,1,7)viterbi convolutional code encoding, decoding, debugging through, you can directly use
ConvolutionWithViterbiDecoding
- QPSK调制下的(5,7)卷积码的编码和维特比译码与BPSK调制下(5,7)卷积码的编码和维特比译码的BER特性-QPSK modulation under (5,7) convolutional code encoding and Viterbi decoding and BPSK modulation (5,7) convolutional code encoding and Viterbi BER characteristic
217
- VITERBI 译码, 2,1,7码,解调卷积码编码,硬比特判卷方法-VITERBI DECODE
8398489
- 一个完整的viterbi(2,1,7)编码程序,使用的是Verilog语言()
619237
- viterbi 约束长度为7的仿真,适用于DAB等卷积编码译码的仿真()
eyye
- 一个完整的viterbi(2,1,7)编码程序,使用的是Verilog语言()
