搜索资源列表
uart
- uart协议、实现、验证，基于wishbone协议，工业标准为16550A-UART protocol, implementation, verification, based on the Wishbone protocol, the industry standard for the 16550A
71477212NiosII_uart
- 串口sopc uart实现串口功能，包含帧的开始字节，命令字节-Serial sopc uart serial implementation features, including frame start byte, command byte
2004-02-29_USB_Das_Control_System_dip
- USB的驱动程序 可以方便的使用 已经通过验证-USB driver can easily use has been validated
carrier_nco
- 通信电路中产生载波的电路，可应用于GPS中的捕获和跟踪环路。-Generated carrier communication circuit of the circuit, can be applied to GPS in the capture and tracking loop.
code_gen2
- GPS中C/A码生成电路，用于ＧＰＳ接收机中的跟踪和捕获。-GPS in the C/A code generating circuit for the GPS receiver to track and capture.
rng
- 通信系统中的噪声发生器，可用于ＣＤＭＡ信号源电路。-Communication system noise generator can be used for CDMA signal source circuit.
pll
- 实现同步时采用锁相环，锁相环实现的原理，及源代码，-Implementation of the principle of phase-locked loop, and the source code,
usb
- USBHostSlave is a USB 1.1 host and Device IP core. – Supports full speed (12Mbps) and low speed (1.5Mbps) operation. – USB Device has four endpoints, each with their own independent FIFO. – Supports the four types of USB data transfer control,
UART_RX
- receiver data from computer via com-interface.
BCH(31_21_5)
- BCH码的编码和解码全部过程的源代码，可以自行改变参数-BCH codes of all the process of encoding and decoding of the source code, can change the parameters
uart_zhiwen
- RS232的UART编程，包括波特率发生器模块，串口接受模块，串口发送模块-RS232 programming the UART, including the baud rate generator module, serial module to receive, send serial module
High_Speed_Stream_ADC
- This project attempts to stream high-speed ADC (or other digital) samples into a computer equipped with USB 2.0 CY3681FX2 AD9245
ruan
- 扩频发射机，信道编码采用(2, 1, 7)卷积 码, 扩频模块采用扩频长度255 的kasami码, 极性变换模块为3bit 量化模式, 内插模块为每两比特间插入7bit 和输出滤波为16 阶的FIR 滤波器。-direct sequence spread spectrum transmitter
ldpcverilog
- verilog编写的ldpc编码的源代码 -ldpc prepared verilog source code
liuVHDL
- 一种基于状态机设计的串并行转换电路，将LTC1196(ADC)的串行输出数据转换成并行数据的转换电路， ADC的时钟由转换电路提供，-Design a state machine based on parallel conversion circuit of the series will be LTC1196 (ADC) output of the serial data into parallel data conversion circuit, ADC clock provided by
USBblaster
- FPGA的USB应用电路，已经成功通过测试，可以量产。-Application of FPGA circuit of the USB has been successfully tested, can be mass production.
uart16750_latest.tar
- Implements a 16550/16750 UART core
FSK_modulation_and_demodulation
- 模拟数字通信通道，将离散数据利用奇偶效验码编码，FSK调制后，发送，接收端解调解码后还原-Analog-to-digital communication channel, the use of discrete data to be well-tested code parity coding, FSK modulation, the transmission, the receiving end to restore the decoded demodulation
EPPTOP
- 在altera fpga中实现epp模式的并口通信程序-epp model of parallel in fpga