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uart_verilog_v1
- uart d的verilog 程序，可以实现普通串口功能-UART d Verilog procedures can be achieved ordinary serial port function
usb_ctr
- usb的verilog 代码。对理解usb的原理有很大帮助，并可以在nc环境下仿真。-usb the Verilog code. Usb to understand the principle is very helpful, and to be nc simulation environment.
UART
- Verilog实现的UART程序，用ISE打开工程文件即可-Verilog implementation UART program, open the project file with the ISE can be
uart16550_latest.tar
- UART16550是较为通用的串口协议，压缩包内有4个文件可供选择，直接提供RTL源码，可直接导入到工程内。-Uart16550 core is used for Serial Commuication.There are 4 folders in the zip package and have the verilog RTL which can be added in the project.
async_receiver
- 用于RS232串口接收数据的verilog语言，时钟速率可改，可直接调用。- ON划词翻译ON实时翻译 Serial port for receiving data of the Verilog language, can be called directly.
receive_spi
- verilog语言SPI通信，可用于CPLD以及FPGA-Verilog language SPI communications, can be used for CPLD and FPGA
RS232
- rs232串口通讯Verilog源码，可直接用于芯片之间的串口通讯-rs232 serial communication Verilog source code can be directly used for serial communication between chips
verilog_422
- 标准RS422 Verilog源代码， 传输波特率可以修改， FPGA上可以工作-Standard RS422 verilog communication source code, buardrate can be updated and it is fully work in FPGA