基于硬件定点的完整的costas载波恢复环设计，FPGA设计可以用之参考。包括输入QPSK信号，16倍符号率采样，初始频差2.4KHz，以及低通滤波器的设计等待。最重要的是有本人的注释，易于上手。-Hardware-based fixed-point of complete costas carrier recovery loop design, FPGA reference design can be used. Including input QPSK signal, 16 times th

产生宽带QPSK信号，并通过rrc滤波，用于检验发射通路的EVM等指标-Produce wideband QPSK signals, and by rrc filter, used to test the emission path of EVM and other indicators

本代码主要用于QPSK数据生成与数据文件写入. 包括随机数据生成, 符号映射,以及发射的升余弦滤波. 最后将生成的文件写入指定的文件里面.-QPSK data generating and data write to file. Random data genrating, symple mapping, trasmitter suqart raise cose filter. At last, data are writen into the file.

1.AWGN条件下QPSK、16QAM、64QAM的仿真；2.单径及多径瑞利信道下三种调制的仿真；3.100MHz多径莱斯信道下三种调制的仿真；4.100MHz多径信道下三种调制的Matched Filter Bound(MFB)仿真-1. Under the condition of AWGN QPSK, 16 qam and 64 qam simulation 2. Single diameter and multipath Rayleigh channel under three kind