搜索资源列表
vga
- 基于FPGA的VGA时序产生/控制器，产生行、场同步时序，并以标准格式输出,并有相应测试代码。开发工具ISE 8.1及以上。-FPGA-based VGA timing generator/controller, resulting in horizontal and vertical sync timing, and a standard format output, and the corresponding test code. Development tool ISE 8.1 and a
hardh264
- 一个硬件H264编码的VHDL源码，用于FPGA开发，适合IP摄像头等视频设备输出数据的编码。用Xilinx工具测试过，但代码不只是用于Xilinx。-A hardware h264 video encoder written in VHDL suited to IP cameras and megapixel cameras. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools
sram_saa1117verilog
- 图像采集、存储控制verilog源代码，fpga控制SAA1117,采集数据存储到sram，仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
read_SD-card
- altera de2-70 FPGA板功能测试实验，用于SD卡0扇区的读写。包含完整源代码，仿真文件，可直接下载到板子上的SOF文件，适合初学者研习。-Altera de2-70 FPGA board function test, used for SD card 0 sector, speaking, reading and writing. Contains the complete source code, the simulation files, can be directly dow
asi_tx
- 用FPGA构造的DVB-ASI发送模块,Verilog代码,本人亲自测试通过.-Using FPGA configuration DVB-ASI transmit module, Verilog code, I personally tested.
hardh264
- 实现H.264的FPGA编码，测试可行，内含可综合代码、测试代码和说明文档(To achieve H.264's FPGA encoding, the test is feasible, which contains comprehensive code, test code and documentation.)