搜索资源列表
leon2-1.0.30-xst.tar
- Leon2 CPU VHDL Source Code 欧洲航天局资助开发的LEON CPU,源码遵循GPL -Leon2 CPU VHDL Source Code European Space Agency funded the development of LEON CPU, followed source GPL
IPCORE
- 最简单的八位单片机8051的源代码，支持MCS51的汇编语言，可综合，VHDL语言描述，有测试环境-most simple eight SCM 8051 source code, a compilation support MCS51 language, integrated, VHDL descr iption of a test environment
jtag_cpld_vhdl
- JTAG CPLD实现源代码，比用简单并口调试器快5倍以上。 以前总觉得简单的并口jtag板速度太慢，特别是调试bootloader的时候，简直难以忍受。最近没什么事情，于是补习了几天vhdl，用cpld实现了一个快速的jtag转换板。cpld用epm7128stc100-15，晶振20兆，tck频率5兆。用sjf2410作测试，以前写50k的文件用时5分钟，现在则是50秒左右。tck的频率还可以加倍，但是不太稳定，而且速度的瓶颈已经不在tck这里，而在通讯上面了。 -JTAG CPLD
embedded_avr_core
- 一个嵌入式微avr的vhdl源代码,.大家可以参考一下 -an embedded micro-avr vhdl the source code. We can take a look
flash_operator.rar
- 本代码为控制三星公司nand flash，型号k9f5608，实现了读写和擦除操作，方便调用,The code for the control of Samsung nand flash, model k9f5608, achieved a read-write and erase operations to facilitate the call
ALU_design
- 一个关于设计简单ALU的说明书，当中附有源代码，测试可行，同时效率比较高，算法也比较完善-A simple ALU design specification, which attached to the source code, test feasible, while more efficient, the algorithm is also relatively perfect
program-example-code
- mini2440非操作系統下的測試源碼,包括對板上所有硬體,介面,記憶體...的測試源碼.例cmos攝像頭等,都包含在內.-mini2440 test under non-operating system source code, including all on-board hardware, interface, memory test source .... Example cmos camera in first class, are included.
mipssimple
- simple MIPS source code very simple it has not complete but you can test it
MIPS
- 带分支预测的MIPS流水线的verilog原代码。 详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
ram
- 用FPGA做的RAM，源码，调试通过，有工程-FPGA to do with RAM, source code, debugging through, there are works
alu
- 描述乘法器，组成原理vhdl实现一位乘法器程序代码-Describe the multiplier, the composition principle to achieve a multiplier vhdl code
16-bit_cpu_design
- 详细介绍了如何设计一个简单的16位cpu.其中包含了从最基础的指令系统开始到最复杂的cu控制器的设计思路，方案.最后还介绍了一些有关vhdl语言的用法,并给出了具体的cpu部件的vhdl代码,从而帮助大家更为深刻的学习如何设计一个简单的cpu-Described in detail how to design a simple 16-bit cpu. Which contains the most basic instruction from the beginning to the most
cpu
- 基于十二条简单汇编指令构成的一个cpu 采用vhdl语言编写 内附源代码 工具sylinx-Based on 12 simple assembly instructions consisting of a cpu using vhdl language source code tool sylinx included
Nand_demo
- 控制nand flash的演示框架，可自行填写代码，clk始终不超过100MHz-Control nand flash presentation framework should fill in the code, clk always less than 100MHz
pn_gen_vhd_211
- vhdl code for adders
cpu
- 16位的5级流水线cpu 采用vhdl代码 modelsim编译仿真-5-stage pipeline 16-bit cpu compiled simulation using modelsim vhdl code
CISC
- cisc8位微处理器的vhdl源码。处理功能：求出1到任意整数N之间的奇数之和。并输出。-cisc8 bit microprocessor vhdl source code. Processing functions: find an integer N between 1 and any odd sum. And output.
cpu
- 《vhdl编程实例》（第四版）内的cup设计源代码 -Cup design source code " vhdl programming examples" (fourth edition)
CPU_VHDL
- 这是实现一个8位和16位cpu的VHDL代码，虽然支持的指令比较少只有20多条，但对于学习CPU的布线架构很有帮助-This is achieved by an 8-bit and 16-bit cpu VHDL code, although only a relatively small instruction support more than 20, but for learning routing architecture CPU helpful
erc32
- ERC32源码VHDL 同时包括了leon2的VHDL源码(VHDL code of erc32 and the source code of leon2)