This getting started exercise will guide you through the step-by-step process of transforming a MATLAB floating-point model into a hardware module that can be implemented in silicon (FPGA or ASIC). The design is a general purpose FIR filter taken fro

This lab exercise will introduce you to the AccelWare IP generators. AccelWare is a library of over fifty IP generators, available in the form of three toolkits that produce synthesizable MATLAB for common MATLAB built in and toolbox functions. Each

This lab exercise will cover the use of AccelDSP’s design exploration capabilities that include mapping variables to memory and unrolling loop and vector operations. You will learn how to create different hardware architectures without modifying the

Often it is necessary to add some logical control to a MATLAB algorithm to allow the generated hardware to function correctly in the overall system. This lab exercise will explore how hardware control can be added to a MATLAB algorithm and synthesize