搜索资源列表
roots2
- vhdl代码 开方实现-VHDL code prescribing achieve
VHDL_decoder
- 个人认为比较使用的几个VHDL源码之五decoder的源码-personally think that the use of the relatively few 5 VHDL source decoder source code
rs-code
- 基于PLD的RS码编译码器设计，用VHDL语言编写，编译通过，测试结果正确。
jtd1
- 交通灯的模拟，分为主干道两个方向进行控制，VHDL源代码，-Simulation of traffic lights, is divided into a main road in both directions to control, VHDL source code,
BPSK_b
- System generator code for BPSK implementation. Pls enjoy it
reed
- this the completedocumentation and code about reed solomon logic implemented on fpga in verilog.-this is the completedocumentation and code about reed solomon logic implemented on fpga in verilog.
HDECODER
- code for hamming code
Verilog
- 全加器的Verilog 实现代码 寄存器的Verilog 实现代码-Low-pass filter integral part of full-adder and register the Verilog implementation code
sigmadelta_verilog_code
- sigma delta verilog code and testbench for you to do simulation
E1_to_e3_v.2.1
- E1信号到E3复用解复用VHDL代码包括时钟合成-E1 to E3 multiplexing & demultiplexing VHDL code, ，including clock synthesis
rgb2ycrcb
- code for jpeg encoder part
VHDL _clav7seg
- clav7seg code source in vhdl
clavier_affichage-sur-un-afficheur
- vhdl code for 7 segment--vhdl code for 7 segment-******---
Nebo_Logger
- vhdl code for testing system
Henson
- h.264 vhdl code its the vhdl code of Video compression formats Lossless data compression algorithms
ReadWrite-RAM-VHDL-source-code
- This page of VHDL source code covers read RAM and write to RAM vhdl code. RAM stands for Random Access memory.It is a form of data storage for various applications. 1K refers 10 lines used for Address bus (as 2^10=1024) 8 refers Data Bus
16QAM-Modulation-VHDL-source-code
- This page of VHDL source code covers 16QAM modulation vhdl code and provides link to QQAM modulation basics.
4X1-MUX-VHDL-source-code
- This page of VHDL source code covers 4X1 MUX vhdl code.
2-bit-parallel-to-serial-conversion-VHDL-source-c
- This page of VHDL source code covers 2 bit parallel to serial vhdl code and provides link to 2 bit serial to parallel conversion.
Synchronization_with_MATLAB_and_FPGA
- 数字通信同步技术的MATLAB与FPGA实现一书的VHDL代码-The VHDL code for the book of digital communication techniques with MATLAB and FPGA realization