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Quartus+II+++ModelSim+SE+++后仿真+++库文件.rar
- Mentor公司的ModelSim是业界最优秀的HDL语言仿真软件，它能提供友好的仿真环境，是业界唯一的单内核支持VHDL和Verilog混合仿真的仿真器。它采用直接优化的编译技术、Tcl/Tk技术、和单一内核仿真技术，编译仿真速度快，编译的代码与平台无关，便于保护IP核，个性化的图形界面和用户接口，为用户加快调错提供强有力的手段，是FPGA/ASIC设计的首选仿真软件。
静态存储器
- 在FPGA设计IP核中，很有用
AMI-BIOS-sourcecode.zip
- AMI 主板的BIOS源码，虽然老，但是对于做操作系统的朋友还是有借鉴价值的，还有做虚拟机开发的也很需要。,AMI motherboard BIOS source code, even though the old, but the operating system so there is still drawing on the value of a friend are also doing virtual machine to have much need for development.
Experiment02
- FPGA低级建模试验二流水灯加闪烁等，通过板级调试-FPGA test two low-level flow modeling lamp, flash, etc., by board-level debugging
dlx_verilog.rar
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
seg7_lut_8_0.rar
- 七段阴极数码管的FPGA控制程序，开发平台为ISE或者quartus,Seven-Segment LED cathode the FPGA control procedures, development platform for the ISE or Quartus
flash02
- 一个我自己写的FPGA读写FLASH代码，在QUARTUS 下用verilog编写，falsh的型号是k9f5608u0d,经测试可以用。-I wrote a FLASH FPGA to read and write code, written in QUARTUS next with verilog, falsh model is k9f5608u0d, can be tested.
cic512.rar
- 5阶cic滤波器，抽取12倍，的verilog程序，已经通过仿真验证，一、具有很高的速率,5-order CIC filter, collected 12 times the Verilog procedures are by simulation, one with a very high rate
uart_1
- 基于VHDL的FPGA串口通讯程序，能够实现FPGA串口通信-VHDL for FPGA-based serial communication programs that enable FPGA serial communication
code
- 《无线通信FPGA设计》书里的matlab和verilog代码-the matlab and verilog code in 《Wireless Communications FPGA design》
EP2C8_NIOS
- 艾米电子的FPGA开发板NIOS实验例程源码-Amy Electronics FPGA development board NIOS Experiment
verilog
- verilog描述的以太网MAC层源代码，功能正确，已经在FPGA开发板上测试！需要的赶紧下-verilog descr iption of the Ethernet MAC layer source code, function correctly, has been tested in the FPGA development board! Need to hurry the next! ! !
qq2
- Xilinx FPGA(CPLD) 下载电缆 原理图 -Xilinx FPGA (CPLD) download cable schematics Xilinx FPGA (CPLD) download cable schematic
DE2_uclinux_hello_zImage
- 在linux下生成的zImage文件，能够在nios上运行，包括了FPGA的下载文件SOF和系统的PTF文件，在DE2上测试成功！-In linux generated zImage file, can be run on Nios, including the FPGA and the download file SOF system PTF file, in DE2 test success!
FPGAEngineerLectures
- 远立科技的一份FPGA工程师培训文档，有些内容讲点比较深入，值得学习。 希望能对初学者一些提示之类的吧-Yuan Li, a FPGA technology engineer training documents, some of the content more in-depth talk about points, it is worth learning. Hope that some tips for beginners like you
bwcfq
- 纯组合逻辑构成的乘法器虽然工作速度比较快，但过于占用硬件资源，难以实现宽位乘法器，基于PLD器件外接ROM九九表的乘法器则无法构成单片系统，也不实用。这里介绍由八位加法器构成的以时序逻辑方式设计的八位乘法器，具有一定的实用价值，而且由FPGA构成实验系统后，可以很容易的用ASIC大型集成芯片来完成，性价比高，可操作性强。-err
xapp548
- Xilinx FPGA 上FPGA的VxWorks操作系统开发资料-Xilinx FPGA on the development of FPGA
FFTdemo
- 快速傅里叶变换，actel的fusion系列FPGA中综合通过-Fast Fourier Transform, actel of fusion series FPGA integrated through
eda
- 课程设计要求设计并用FPGA实现一个数字频率计,功能：频率计。具有4位显示，能自动根据7位十进制计数的结果，自动选择有效数据的-Curriculum design to design and FPGA implementation of a digital frequency meter, function: frequency meter. With four shows that will automatically count 7 the results of the metric sys
IEEE802
- 基于IEEE802_11aOFDM同步算法的FPGA实现.pdf-this a paper of ofdm