搜索资源列表
up_counter
- up_counter code use VHDL for FPGA
Schlib1.~(1).SchLib.Zip
- thu vien fpga cua son
lcd_display
- lcd_display use vhdl in fpga
Wireless_Communication_design_of_fpga-source_code.
- 书籍“无线通信fpga设计”里的源代码实例，里面有verilog和MATLAB两种语言实例-Books " wireless communications fpga design" in the source code examples, there are two languages verilog and MATLAB examples
viterbi
- 程序来自《现代通信系统－使用matlab》英文版 已经调通！并加上了注释。 希望对大家有帮助2-fpga
shuoming
- 程序来自《现代通信系统－使用matlab》英文版 已经调通！并加上了注释。 希望对大家有帮助3-fpga
trafficlight
- fpga的交通灯试验程序 可成功实现功能齐全-fpga testing procedures of the traffic lights are able to achieve a full-featured
adder
- 全加器，用fpga语言编写的，可实现数字电路技术中的全加器的功能，符合逻辑原理图。-adder
HammingDecoder
- -- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection. -- download from: www.pld.com.cn & www.fpga.com.cn LIBRARY ieee U
decoder3_8
- 3-8decoder实现fpga功能，3-8decoder实现fpga功能-3-8decoder
dianyabiao
- 数字电压表的设计，范围0到5V之间，基于FPGA控制的VHDL程序-The design of digital voltage meter, between the range of 0 to 5V, the VHDL-based FPGA control procedures
FPGA_RSIC_CPU
- FPGA_RSIC_CPU使用FPGA实现CPU-FPGA_RSIC_CPU
vga_demo.v.tar
- vga controller made for basic students projects in fpga vga controller made for basic students projects in fpga -vga controller made for basic students projects in fpga vga controller made for basic students projects in fpga vga controller
cpld_key
- FPGA 实现独立式按键，每按一下数码管+1，数码管是静态显示
61EDA_D1037
- 实现IIC协议,非常适合初学FPGA者，是很好的参考代码。-EEPROM
sdram_mdl
- 基于FPGA的SDRAM控制硬件源代码程序，-FPGA-based SDRAM controller hardware source code program,
FIRfenbushisuanfa
- 基于分布式算法数字滤波器 VHDL语言编写 适用于FPGA-Digital filters based on distributed algorithms written in VHDL for FPGA
vhdl
- 数字信号处理的FPGA实现(Uwe Meyer-Baese)书中例子的VHDL代码-FPGA implementation of digital signal processing (Uwe Meyer-Baese) examples of VHDL code for the book
sram_interface
- 这是有关FPGA访问SRAM的硬件描述语言代码，需要的话可以参考参考-It is about access to SRAM in FPGA hardware descr iption language code, if necessary can refer to the reference
sanfenpin
- verilog 三分频 分频器是FPGA设计中使用频率非常高的基本设计之一，尽管在目前大部分设计中，广泛使用芯片厂家集成的锁相环资源，如altera 的PLL，Xilinx的DLL.来进行时钟的分频，倍频以及相移。-verilog-third of the frequency divider is a FPGA design, very high frequency of use, one of the basic design, although most of the designs in