基于FPGA的DDS信号发生器设计，包含Quartus 的工程，打开即可使用，Verilog 语言编写！-The DDS signal generator based on FPGA design, including the Quartus project, open to use, Verilog language! 朗读 显示对应的拉丁字符的拼音 字典- 查看字典详细内容-FPGA design, including the Quartus project, open to use, Ve

Quartus 12.1. Altera Software

vga显示代码 Verilog语言 开发环境为quartus II，alteraFPGA-VGA display Verilog

this is a licence file to crack quartus II version 15

直接用模块就行了，加入到quartus里面即可(just use these modularities,then add these into your quartus)