搜索资源列表
AD7864
- 这是对上次AD7864采样程序的改进，增加了FIFO的编程，功能比上次源码更加完善！-This sourse is modified and I have added the program of FIFO,so its function is better then privious one.I hope it is helpful for you!
program
- 设计实现4bit FIFO, 数据深度为8， 产生满， 空状态标志-The diagram of FIFO is shown in figure 1. The FIFO consists of two component: FIFO control logic and RAM. The control logic generates the address (ADD) and write enable (WE) to the RAM so that the fi
clk_3d
- 一个1.5分频的VHDL程序,经过编译和仿真.-A frequency of 1.5 points VHDL program, after compiling and simulation.
fftverilog
- verilog写的 fft 程序 大家 下载吧 希望能够喜欢-fft write verilog program we hope to be able to download it like Ha, ha, ha
Chapter1-5
- 第一章到第五章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
final
- nice control program pwm
cpu-poc
- 满足并行输出输入的功能，同时与打印机相连，程序中又添加了微处理器的程序。-To meet the parallel input-output function, while with the printer connected to the program has added a microprocessor program.
course-design-cpu-poc
- 满足并行输出输入的功能，同时与打印机相连，程序中又添加了微处理器的程序。-To meet the parallel input-output function, while with the printer connected to the program has added a microprocessor program.
POC
- CUP 与打印机的接口POC，主要实现了握手信号的交流和数据的传输。程序运用了语言VHDL-CUP and the printer interface POC, mainly realized exchange handshake signals and data transmission. Program used the VHDL language
mp3_player_neek
- A test program for SD card on DE2 board
QDPSKvhd
- 基于quartusII的QDPSK调制解调vhdl程序。-Modulation and demodulation based quartusII of QDPSK vhdl program.
eda
- 利用vhdl设计fir滤波器，有完整程序， 包含加法器，乘法器。-Design using vhdl fir filter, a complete program, including adders, multipliers.
SUSAN
- 图象匹配中最常用的是基于面积的匹配，该匹配方法是把一幅图象中某一象点的灰度邻域作为模板，在另一幅图象中搜索具有相同(或相似)的灰度值分布的对应点的邻域，从而实现两幅图象的匹配〔2，。在搜索过程中，通常是以互相关函数作为两个搜索邻域间的相似性测度。 -this ie a program is in the inviroment.we can use it bring a lot of benefit to us.
rs(31-19)
- 本源代码是RS（31,19）编码器的顶端实现程序和测试程序，此程序可以验证编码器工作与否。此代码，已在ModelSim验证通过。并附上测试时所产生的结果图像。-Source code is RS (31,19) encoder to achieve the top programs and testing procedures, this program can verify the encoder to work or not. This code has been verified in M
VHDL_exp
- VHDL程序包括IIC和PS2，LCD，USB-VHDL program includes IIC and PS2, the LCD, USB, etc.
16
- dtc vhdl program for running induction motor
UART_RS232(VHDL)
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在PC机上安装一个串口调试工具来验证程序的功能。程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控制器，10个bit是1位起始位，8个数据位，1个结束位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实现相应的波特率。程序当前设定的div_par 的值是0x145，对应的波特率是9600。用一个8倍波特率的时钟将发送或接受每一位bit的周期时间划分为8个时隙以使通信同步.程序的工作过程是：串口处于全双工工作状
chuankoufasong
- 可以实现FPGA的串口发送与接收的vhdl程序-Can to achieve the FPGA serial interface to send and receive the vhdl program
parallel_search_for_maximum_weight_latest.tar
- Completely tested VHDL program for parellel search for maximum weight. Includes tesbenches as well. Totally synthesizable
VHDL
- VHDL语言中的符号扩展方法,方法简单可靠，可以用来快速编写 vhdl程序，希望对大家有帮助。-VHDL language sign extension method, the method is simple and reliable, can be used to quickly write vhdl program, we hope to help.