搜索资源列表
lcd_module
- verilog code which receive from uart RX and then output to lcd text display.
encode
- 用verilog写的8B10B编码源代码。似乎有点难度来理解。这里并未使用case语句，而是完全的用的组合逻辑化简-Use verilog write 8B10B encoding source code. Seems difficulty understood.
MSK
- 用VERILOG编写的MSK调制模块的程序代码 简单易懂-MSK modulation with a VERILOG module written in easy to understand code
jiaotongdeng
- 交通灯程序，verilog源代码，测试通过。-Procedures for traffic lights, verilog source code, test.
I2C
- 用verilog编写的驱动I2C接口的存储器pca9534的程序运行成功-Prepared using verilog memory-driven I2C interface of the program to run successfully pca9534
111.ver
- verilog code for CPU design by Mohammad Hosseini.
111m
- verilog code for cpu and bus.
111moh
- verilog code for cpu and registers.
fft
- vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
Useful_data
- Full flow descr iption of the flow of developing the verilog code in ISE and steps in implementing and executing in fpga
UART_RS232(verilog)
- /本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在PC机上安装一个串口调试工具来验证程序的功能。程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控制器，10个bit是1位起始位，8个数据位，1个结束位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实现相应的波特率。程序当前设定的div_par 的值是0x145，对应的波特率是9600。用一个8倍波特率的时钟将发送或接受每一位bit的周期时间划分为8个时隙以使通信同步.程序的工作过程是：串口处于全双工工作
rall_gen0
- 产生霍尔信号的使用verilog语言设计代码，能产生4种马达转速的设计（960转/分钟，1440转/分钟，2880转/分钟，4800转/分钟）供参考-Generate Hall signals use the verilog language design code to produce the design of the motor speed (960 r/min, 1440 r/min, 2880 r/min to 4800 rev/min) for reference
serial-communication-source-code
- 这是一个有关于串口通信的原码，主要是用verilog语言来实现，采用的是模块联合方法。-This is a serial communication source code, verilog language, using the module combination method.
Theworldoflinkedstatemachine
- verilog代码 可以在VGA上显示菱形变化的条纹-Verilog code can the rhombus change the stripes displayed in VGA
A > B gate Verilog HDL
- Just a Code to help with Verilog HDL
lift-code
- FIVE FLOOR LIFT CONTROLLER VERILOG CODE
135-classic-Verilog-design-example
- 包括VHDL的各种代码资料，以及仿真程序，例子不错。-Including all sorts of VHDL code information, as well as the simulation program, good example.
verilog-code
- CF卡的源码 verilog编写实用试用，大家可以参考一下-THE SORCE OF CF,USE VERILOG
Verilog源代码
- 多种基本功能的Verilog代码实现，包括多路选择器，二进制到BCD码转换，二进制到格雷码转换，7段译码器，8位数据锁存器，移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit dat
ddr3
- ALINX7010 ddr3读写测试仿真实验官方教程 附说明和代码 Vivado 实现(Alinx7010 DDR3 read write test simulation experiment official course Descr iption and code attached Vivado implementation)