搜索资源列表
FPGA_common
- 关于FPGA的一些常识及含IP核的VHDL设计源代码。-on FPGA with some common sense and VHDL IP core design of the source code.
LPM_ff
- VHDL中IP核之参数化触发器中文使用介绍-VHDL IP parameters of the nuclear trigger on the use of Chinese
LPM_sub_add
- VHDL中IP核之参数化加减法器中文使用介绍-VHDL IP parameters of the nuclear modified instruments used on the use of Chinese
DesignofTrainCommunicationAdapterBasedonSOPC
- 介绍了MVB总线帧结构,并完成了用于网络连接的MVB总线访问IP核的设计。-introduced the MVB bus frame structure, and completed the network connection for the MVB bus visit IP core design.
altera+dpd
- 数字预失真在通信领域内IP核的开发文档,包括数学表达式及硬件框图-Digital Predistortion in the field of IP communications in the development of nuclear documents, including mathematical expression and hardware block diagram
~CDDBNY834200PDF
- 探讨RISC32处理器设计中三个关键问题包括多媒体指令集扩展设计、流水线微结构优化设计以及使RISC32成为一个真正IP核的其他相关设计问题-explore RISC32 processor design three key issues, including the expansion of multimedia instruction set design, pipelined micro-structural optimization design and make RISC32 beco
LCD_IP_code
- LCD的通用驱动电路IP核设计..... -generic LCD driver circuit IP Core Design ...
OCPSpecification
- OCPSpecification 2.2,OCP-IP组织提出的IP核互联的规范,详细的使用说明文档。
ipcore
- 如题所示.可复用SPI模块IP核的设计与验证
ps2_ipcore_design
- 电子测量技术 ELECTR0NIC MEASI瓜EMENT TECHN0L0GY 第29卷第3期 2006年6月 PS/2设备接口IP核设计 王 豪黄启俊常 胜 (武汉大学物理学院微电子与固体电子学实验室武汉430072) 摘要:用Verilog硬件描述语言实现了PS/2设备接口的II)核设计,详细描述了II)核的结构划分和各模块的 设计思想,并在FPGA上进行验证。结果表明此 核功能正确,可以方便地在SOPC系统中复用。
SOPCVGAIP3090114
- 基于 SOPC 的 VGA IP 核设计-Based on SOPC the VGA IP core design
fpga_da
- 在测控系统中用IP核实现DA转换.doc-Measurement and control system used in the IP core to achieve DA conversion. Doc
AVR_Core
- 十五个免费的IP核大家可以尝试测试与修改,多多利用-15 free IP core that we can try to test and modify, make greater use of
15Altera_IP
- 里面包含15个altera的IP核的源代码,包括I2C,UART,VGA_SYN-Which contains 15 nuclear altera the IP source code, including I2C, UART, VGA_SYN
20080114101033619
- QUARTUSII中IP核的使用说明,例子很详细,很实用。-QUARTUSII
51_IP_CORE
- 用HDL硬件描述语言写成的MCS51系列单片机IP核,其中包括4位的MCU,内容系4篇硕士论文,其中两个需要用CAJ阅读器打开 -HDL Hardware Descr iption Language with written MCS51 Microcontroller IP core, including 4-bit MCU, the contents of a master' s thesis, Department 4, two of which need to open the
ip-nuclear
- 本文详细讲述了ip核基本知识和概念,以及其构成-About the basic knowledge and concepts of nuclear ip
altera-tse-ip
- MegaWizard_Plug-In工具生成altera三速以太网IP核并编译仿真-MegaWizard_Plug-In tool to generate altera Triple Speed Ethernet IP Core and compile simulation
XILINX_DDR3_IP核使用教程
- 详细介绍了Xilinx DDR3 IP核的使用方法和注意事项(The usage and attention of Xilinx DDR3 IP core are introduced in detai)