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8bit.详细的八位十六进制频率计课程报告
- 详细的八位十六进制频率计课程报告，是我的eda课程设计报告书,Detailed eight hexadecimal Cymometer curriculum report is my report on the curriculum design EDA
EDA
- 一个关于八位十六进制频率计设计的VHDL语言编程 可以下载的哦-a good word about EDA you can get some information from it
vhdl
- 数字时钟20进制，包含源代码。仅供参考。不负任何责任。-shuzishizhong
8-jinzhi-counter
- 8进制计数器 每计数八次进一次位，vhdl语言的基础程序，对初学者很有帮助-8 binary counter into a bit of each of eight counts, vhdl language based program, very helpful for beginners
10-jinzhi-counter
- 10进制计数器 每计数十次有一个进位，是vhdl编程的基础程序，应用于fpga cpld可编程逻辑器件-Total scores of 10 binary counter has a per carry, is the basis for vhdl programming procedures used in programmable logic devices fpga cpld
15-jinzhi-counter
- 15进制计数器 每计数十五次有一个进位，是vhdl编程的基础程序，应用于fpga cpld可编程逻辑器件-Fifth decimal counter 15 counts each have a carry, is the basis for vhdl programming procedures, programmable logic devices used in fpga cpld
cny24
- 24进制加法计数器适用于vhdl和quartus-24 binary adder vhdl counter applied and quartus