搜索资源列表
allegro_PCB_SI
- cadence allegro_PCB_SI 仿真-cadence allegro_PCB_SI simulation
PA_workshop_instruction
- cadence 官方workshop资料。关于功率放大器仿真。-cadence official workshop information. About the power amplifier simulation.
cadence_op_test_guid_-_new
- cadence spectre下单端运放的仿真方法总结-conclusion of simulation method of opamp with spectre
Cadence_Allegro16.5_crack
- cadence allegro spb 16.5 破解下载，本破解经本人经在Windows 7 64位和 windows XP 32位系统下验证通过没问题。强烈推荐！-cadence allegro spb 16.5 crack download, this crack by himself by validation through no problem in Windows 7 64-bit and windows XP 32-bit systems.Highly recommended!
designsync-manual
- 版本控制工具design sync的说明文档，可用于基于cadence ic51, ic61的芯片设计文件的版本控制及其扩展编程-Version control tool design sync the documentation that can be used based on cadence ic51, ic61 chip design document version control and expand programming
Allegro16.6-constraint-rules
- Allegro16.6约束规则设置详解，学习Cadence allegro的极好教程。-Allegro16.6 constraint rules set detailed, excellent tutorial to learn Cadence allegro.
FPGA-System-Planner-hand-book
- FSP 工具是 cadence 公司为了 FPGA/PCB 协同设计而推出的一个解决方案工具包。它的主 要工作是由软件来自动生成、优化 FPGA 芯片的管脚分配，提高 FPGA/PCB 设计的工作效率和连 通性。FSP 完成两顷重要工作：一、可以自动生成 FPGA 芯片的原理图符号（symbol）；二、自 动生成、优化和更改 FPGA 器件相关部分的原理图。一个复杂的 FPGA/PCB 的设计，能节约原理 图设计工作 50 -90 的时间，并能节约大量 PCB 设计阶段 FPGA
FVofDiffOpAmp_wp
- cadence diff-opamp test bentch
PCBM_LP_Viewer_V2010(1)(1)
- 用Cadence画图时，需自己设计元件封装。幸好有Mentor Graphics IPC-7351 LP Viewer 10.2，这是个基于IPC-7351通用标准的浏览软件，可以查看各种器件的封装。 IPC-7351标准覆盖所有类型的无源及有源器件件的焊盘图形设计，包括电阻器、电容器、MELFS、TSSOPS、QFPS、球形阵列封装、方形扁平无引脚封装、小外形无引线封装等。IPC-7351为每个元件提供了三个焊盘图形几何形状，即高元件密度、中等元件密度、低元件密度，软件中对应的CAD
tutorial_asic_v12_1
- tutorial_asic_v12_1 Digital Design Flow Tutorial for EDA Tools: Synopsys Design Compiler Mentor Modelsim Cadence SOC Encounter
verilog_intro-Cygwin
- verilog_intro-Cygwin environment and as a design tool. The Cadence design tool suite is installed on the Linux servers on our network. We will use be using the GUI interface which will allow us to view waveforms in a timing diagram. This also r
full_custom_design_with_cadence_and_ams_hit-kit.p
- full custom design with cadence and ams hit kit
sp601_gerber
- Xilinx Spartan-6 开发板原理图加PCB-PCB运用的是Cadence Allegro
pspice-slps-interface-28
- matlab cadence 仿真第三方链接程序slps-slps connect MATLABand cadence PSPICE
版图设计的一般规则
- 版图设计的一般规则，cadence layout资料
VerilogLangRefManual
- The information contained in this draft manual represents the definition of the Verilog hardware descr iption language as it existed at the time Cadence Design Systems, Inc. transferred the language and its documentation to Open Verilog International
eetop.cn_MentorKG
- crack mentor fo calibre or cadence
EDA365_Skill_Setup
- eda365 skill setup for cadence allegro skill tools
CC2650-SensorTag
- TI 官方的CC2650 SensorTag原理图与PCB，cadence格式-CC2650 SensorTag SCH PCB,use CADENCE Tool
Allegro-PCB-SI--
- cadence软件仿真部分操作说明,主要是si部分-cadence soft