搜索资源列表
cpld_fpga_SW
- 里面介绍了＂CPLD，FPGA软件编程＂，里面许多许多例子，还有原代码，我也是辛苦才收集到的资料，希望能给其他工程师派上用场．-they introduced the "CPLD, FPGA software program" Inside many, many examples, the original code, I also hard to collect the information in hopes of giving the other engineers u
CPLD-radom
- 基于C P L D 的伪随机序列发生器，用FPGA产生随机序列的-CPLD-based pseudo-random sequence generator, generate random sequences using FPGA
an428
- MAX II CPLD 设计手册 英文版-MAX II CPLD Design Guidelines
Motor_drive_board
- 电机驱动板，采用ipm，cpld保护，电流电压检测，编码器信号处理-Motor drive board, using ipm, cpld protection, current and voltage detection, signal processing encoder
sch
- emp1270 cpld开发板原理图，包括底板和实验板的原理图-emp1270 cpld development board schematics, including the floor and the test board schematic
cpld
- 在嵌入式系统中cpld降低功耗的方法,来源：电子系统设计-method of reducing power consumption for cpld
CPminal
- CPLD现场数据录入终端的设计CPLD design of field data entry terminal-CPLD design of field data entry terminal
cpld
- EDA工具安装调试和下载程序的说明文档，它主要有国内外最常用的芯片的烧写说明。-EDA tools installation and download the documentation, it is mainly the most common chip domestic and international programming instructions.
Electronics---Digital---Cpld-And-Fpga---Fpgasigne
- Fpga Cpld Quick Start Guide with "Altium Designer"
CPLD-device-application
- CPLD器件在时间统一系统中的应用，包括时间同步协议及编码的实现-CPLDdevice application in time system
CPLD
- 秒表的cpld系统图；Altera公司的芯片；-The stopwatch the cpld system Figure the Altera chip company
CPLD
- 基于lattice的CPLD时钟除频的编程与设计。-Lattice-based CPLD clock divider programming and design。
DSP-CPLD
- 基于DSP和CPLD的电力参数检测装置 基于DSP和CPLD的电力参数检测装置-Power Parameters Based on DSP and CPLD detection device the power parameter detection device based on DSP and CPLD
10B-encode-by-CPLD
- 光纤通道的8B10B编码在CPLD上的实现与验证，编码器由数据字符编码、控制字符编码核Disparity运算三个模块组成。-Fibre Channel 8B10B coding on the CPLD Implementation and verification, data characters encoded by the encoder, the control character encoding nuclear Disparity computing three modules.
LEARNING-DSP-and-CPLD
- 基于DSP和CPLD的多通道数据采集系统，详细介绍了这类采集系统的运行原理-DSP and CPLD based multi-channel data acquisition system, detailing the operation principle of this type of collection system
cpld
- CPLD与电子CAD报告 VHDL中的并行语句、进程 信号、变量、顺序语句 分频器、计数器、译码器、状态机 数字钟综合设计-CPLD and VHDL electronic CAD report in parallel statement, the process signals, variables, sequential statements divider, counter, decoder, an integrated digital clock state machine des
CPLD-book
- CPLD学习资料，希望能够帮到大家，有问题大家多多交流，一同进步-CPLD study sources
cpld
- 基于cpld的可调数字钟，实现计时，调时、整点报时的功能-cpld clock
Digital-design-with-CPLD-
- 基于VHDL语言的CPLD数字应用设计(R. Dueck, 2000)-Digital design with CPLD applications and VHDL (R. Dueck, 2000)
cpld
- 郭天祥10天学会CPLD视频配套课件，适用于初学者。-Mistakes in An 10 days to learn CPLD supporting video courseware for beginners.