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利用ISERDES和OSERDES实现高性能 .pdf
- FPGA DDR2设计资料
MT47H64M8
- ddr2数据手册，开发必备
DDR
- 关于DDR SDRAM的详细原理和时序分析,对于开发设计有很大使用价值-DDR SDRAM on detailed principles and timing analysis, design for the development of a great value
fpga-pinball_for_c
- VHDL 基于FPGA 和VGA 接口的应用设计-vhdl
ddr2_sdram_controller
- 关于DDR2 SDRAM 控制器的相关论文资料-ddr2_sdram_controller
DDR2_hardcore_userguide
- xillinx Spartan6 FPGA DDR 接口设计指南-xillinx Spartan6 FPGA DDR Interface Design Guidelines
EFL50-LS2766P-VGA-DDR2-R10-20051222
- Compal Mini (EFL50) ATI VGA/B M52-P
S5PC100_UM_REV1.04
- Samsung s new ARM cpu datasheet. S5PC100 Spec. - CPU ARM Cortex-A8 667-833Mhz - 32KB L1, 256KB L2 Cache - Video 720p (1280x720 Play. h.264 divx, mp4...) - nand, sd/mmc, usb booting - Windows CE 6.0, Linux (*Android) support - support 1
Au1300_B_20090210
- RMI s Au13xx CPU Datasheet. CPU Spec. - MIPS CPU 533,667,800MHz - Video 1280x720 play (Au1370, Au1380) - support memory bus clock 333MHz (DDR2-667) - simular to Au1250-RMI s Au13xx CPU Datasheet. CPU Spec. - MIPS CPU 533,667,800MHz -
JESD79-2F
- ddr2 标准，详细描述了DDR2 的时序要求，详见http://www.jedec.org/-ddr2 spec for details :http://www.jedec.org/
512MbDDR2
- micro 512Mddr2详细specification-micro ddr2 spec
MT47H128M4_MT47H64M8_MT47H32M16
- micron公司DDR2 SDRAM资料：MT47H128M4_MT47H64M8_MT47H32M16.pdf-micron DDR2 SDRAM：MT47H128M4_MT47H64M8_MT47H32M16.pdf
DDR2standardize-Chinese-version
- DDR2规范中文版，对ddr2控制器编写十分有用-DDR2 specification Chinese version prepared ddr2 controller is very useful
DDR2_timing_spec(Samsung)
- 三星的DDR2操作时序规范，很详细-DDR2 Operation timing specifications (Samsung)
sdram_controller_latest.tar
- This project implements a DDR2-SDRAM Controller on a Xilinx Spartan-3A Board
JESD79-3E
- This document provides implementation instructions for the DDR3 interface-This document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this
VerilogHDL-DDR2SDRAM
- 关于DDR2 控制器的设计 是通过verilog语言设计-DDR2 controller design through verilog language design
design-method
- 基于Xilinx_fpga的ddr2控制器设计方法，英文版本，有注释-Based Xilinx_fpga of ddr2 controller design method, the English version, there are notes
adr_cntrl_timing
- 对于得ddr2开发重要的文档，可以用fpga完成设计实现。-For the development of important documents have ddr2 can be used to complete the design fpga implementation.
DDR2 Spec
- JESD79-2F， DDR2 Spec 定义时序，IO，封装。调试DDR2的参考资料