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GPIO
- GPIO (General Purpose Input and Output ports) with microprocessor programmable tri-state bus interface-Use verilog to design a 48 control points that can be programmed to input or output controller
avs_export
- the avalon verilog slave sram interface fron be micron
FPGAdeguangshanjiancejishu
- 本文档设计了1光栅位移传感器信号的接收、光栅位移传感器信号的整形及电平转换电路设计，用Verilog HDL描述了锁相倍频细分和零位信号处理电路。利用FPGA实现光栅位移系统与上位机接口的电路原理框图-This document designed a grating displacement sensor signal reception, grating displacement sensor signal shaping and level conversion circuit design
wumayi
- chipscope pro的工作原理、chipscope pro在实现高速误码测试时与其他各部分的接口关系、Verilog语言和ISE软件、chipscope pro在实现误码测试时的工作流程和调试办法-chipscope pro works, chipscope pro high-speed BER testing in other parts of the interface relations, Verilog language and ISE software, chipscope pr
SPI_VERILOG
- SPI串行总线接口的Verilog实现.pdf 通过FPGA实现-The Verilog implementation of the SPI serial bus interface. Pdf FPGA implementation
verilog-uart
- UART（Universal Asynchronous Receiver Transmitter，通用异步收发器）是广泛使用的异步串行数据通信协议。下面首先介绍UART硬件接口及电平转换电路，分析UART的传输时序并利用Verilog HDL语言进行建模与仿真，最后通过开发板与PC相连进行RS-232通信来测试UART收发器的正确性。-UART (Universal Asynchronous Receiver Transmitter, Universal Asynchronous Receive
spibus
- serial peripheral interface bus in verilog
systemverilog
- 是关于System Verilog的课件，简要介绍了了System Verilog的用法，主要介绍进行可仿真和可综合的硬件设计，作为Verilog的扩展，在抽象设计、测试平台和基于C语言的应用程序设计接口有重大改进。-About System Verilog courseware, brief introduction of System Verilog usage introduces conduct can be integrated simulation and hardware desi
verilog-ieee
- The Verilog ¤ Hardware Descr iption Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it
uart
- RS232接口，uart用verilog语言实现-RS232 interface, uart with verilog language