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- Verilog and VHDL programs for sipo buffer,d flip flop etc
DDS1
- 直接数字频率合成器（Direct Digital synthesizer）是从相位概念出发直接合成所需波形的一种频率合成技术。一个直接数字频率合成器由相位累加器、加法器、波形存储ROM、D/A转换器和低通滤波器（LPF）构成-Direct digital frequency synthesizer (Direct Digital synthesizer) is the concept of direct synthesis from the requirements phase of a wav
part4
- d flipflop using verilog
verilog-d-filp-flop
- Verilog code of D-Flip Flop
高速图像压缩编码器的VLSI结构设计研究
- 高速图像压缩编码器的VLSI结构设计研究.kdh 相当有水平的博士论文。里面详细讲到了如何设计小波变换VLSI结构。并对verilog hdl设计结构进行了评估-The high-speed image compression VLSI architecture design of the encoder the study. Kdh quite the level of Ph.D. thesis. Which talked about in detail how to design VLSI
Advanced Digital Design with the Verilog HDL
- Advanced Digital Design with the Verilog HDL (M.D.Cilett)
DLL-verilog
- verilog model of a D-verilog model of a DLL
ADDA
- 实现AD和DA的转换，通过Verilog实现这个功能(Realize the transformation between AD and DA, and realize this function through Verilog.)