搜索资源列表
Stepper_controller_MAx
- stepper motor controller vhdl and verilog code is given with explainintion testbench in verilog quartus and modelsim implementation is also awailable -stepper motor controller vhdl and verilog code is given with explainintion testbench in verilog qu
testbench_vantage
- 芯片设计验证测试技术方法，基于verilog语言-testbench for ASIC Design, Verilog
how_to_write_TestBench
- Verilog的testbench写法。网上搜集的内容。有好几个文档。-Verilog for testbench written. Online collection of content. There are several documents.
A-Verilog-HDL-Test-Bench-Primer
- 学习资料：详细说明了如何用Verilog语言编写Testbench文件-Learning materials: detailed descr iption of how to use Verilog language Testbench file
testbench_verilog
- Verilog语言中的testbench的语法教程，可供参考，分享分享-Verilog language in the testbench grammar, reference, share
2D-DCTVERILOG
- 2D DCT VERILOG CODE WITH TESTBENCH WHICH HAVING 1D DCT TRANSPOSE MATRIX