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d4-7.tar
- 这是个trace drive的Cache模拟器，可以在window和linux下编译运行，是做体系结构研究的好帮手
simulator
- 开源的基于SystemC的模拟器，可以模拟ARM CPU, Cache, DDR，NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is
tracecache
- Trace cache simply guideline here.
spring-test
- Cache模拟器 程序运行时，都会对内存进行相关操作，所访问的内存地址可以被记录下来，形成memory trace文件。在本实验中，你将使用benchmark程序产生的memory trace文件来测试Cache命中率，文件可以在http://cseweb.ucsd.edu/classes/fa07/cse240a/proj1-traces.tar.gz上获得。-Cache simulation
trace
- establish a cache of non-redzone-protected stacks. Add enough room for any overhead.
TraceCache_slides
- trace cache原理与设计，超标量处理器架构-trace cache principle and design, superscalar processor computer architecture