搜索资源列表
frequency
- 时钟信号的各种分频、倍频实现，利用PLL实现及Verilog HDL语言。-The application of different frequency
OFDM_rece_matlab
- 接收端采用的算法和程序流程与发送端发送的OFDM符号的帧结构有关系。具体的帧结构，以及定时估计，频偏估计，剩余误差跟踪的算法可参考算法说明文档。这里对程序的流程进行说明。 首先根据短训练字的特性进行相关运算，进行信号到达检测，当检测到相关值大于门限一定次数后，认为有信号到达。然后根据长训练字的特性，进行相关运算，进行OFDM符号FFT窗口起始位置的估计。估计出FFT窗口的位置后，先在时域进行小频偏的估计，将两个长训练字进行小频偏补偿后，进行FFT运算，根据FFT运算的结果进行整数倍频偏的估计
QEP5
- 用matlab的m文件编写的编码器初步仿真，实现了正余弦波、方波，以及脉冲计数和四倍频脉冲计数，初步实现了编码器的初步模型。-With matlab m-file write encoder preliminary simulation, to achieve a positive cosine wave, square wave, and pulse count and quadruple pulse count, the initial realization of preliminary
Offset-CS-Algorithm-in-LTE
- ：LTE(Long Term Evolution，长期演进)系统中的小区初始搜索过程通过分别检测主同步信号(Primary Synchronization Signal，PSS)和辅同步信号(Secondary Synchronization Signal，SSS)来完成，搜 索结果包括小区组ID、符号定时、频偏估计、组内小区ID以及帧定时[1]。然而，若接收信号 1IDN 2IDN 中存在整数倍频偏，则由于时域的相位旋转，主
CHG_20121211_01
- 单相逆变，采用单极性倍频调制模式，两电平逆变，simulink仿真模型-Single phase full bridge inverter, and adopts the model of single polarity modulation frequency doubling, two level inverter, simulink simulation model
beipinnibian
- 级联逆变器，提高电压等级使用倍频逆变 使输出波形更接近正弦 谐波率更小-Cascade inverter, improve the use of multiple frequency inverter voltage level Make the output waveform is closer to the sine harmonic rate is smaller
Octave-program
- 倍频程序适合各类晶体倍频转换效率计算和最佳匹配角模拟分析-Octave program
01-Oscillate
- C8051F120的时钟配置,外部时钟源PLL倍频到100MHZ,-C8051F120 clock configuration, the external clock source PLL frequency multiplier to 100MHZ,
DPLL
- 对输入信号实现1.5倍频，输入数字信号频率范围 是1050~1100Hz（不一定是50 占空比的方波，并且输入信号频率可能在1050~1100Hz内缓慢变化，频率变化速率不高于小于10Hz/s），要求输出50 占空比的信号，并且频率是输入的1. 5倍，并能够连续跟踪输入频率的以及相位改变。-The input signal to achieve the 1.5 multiplier, input digital signal frequency range is 1050 ~ 1100Hz (n
moniti__6
- 第六届蓝桥杯嵌入式组，模拟题程序，倍频输出，按试题要求满足全部功能-Sixth Blue Bridge Cup embedded group, the program simulation title, frequency output, according to the papers required to meet all of the features
Vibration_Level
- 城市区域振动求Z振级的应用程序，mat文件含1/3倍频程-Urban areas of vibration for Z vibration level application, mat files contain a third octave
Source_Code
- Xilinx的IP核源码例化，可实现分频和倍频处理，亲测成功-Xilinx instantiated IP core source code, which can realize frequency and frequency doubling processing, measuring success
BSF
- 二倍频的陷波器的设计过程， 文档中有子函数，自由调用-BSF
count_5
- 5路光栅信号的数字滤波、四倍频、同步锁存、计数-5-way digital filtering raster signal, quadrupled synchronous latch count
TX_RX
- FPGA用verilog实现串口和电脑的字符串以及单字符精准无误通信，即通过电脑向FPGA发送任一长度数据，FPGA返回PC相同的数据。波特率为9600，本例程为了得到精准的波特率使用了50M时钟的3倍频，测试可用，如有不明的地方，可以给我留言-FPGA implementation using verilog string and the computer serial port and single-character accurate communication, 9600, FPGA u
muijie_v28
- 模式识别中的bayes判别分析算法，直线阵采用切比学夫加权控制主旁瓣比，包括单边带、双边带、载波抑制及四倍频。- Pattern Recognition bayes discriminant analysis algorithm, Linear array using cut than learning laid upon the right control of the main sidelobe ratio, Including single sideband, double sideban
pengsai
- 基于掌纹识别的在线身份验证 识别算法本科毕设，包括单边带、双边带、载波抑制及四倍频,IMC-PID是利用内模控制原理来对PID参数进行计算。- Verify recognition algorithm based on palmprint recognition undergraduate complete set of online identity, Including single sideband, double sideband, suppressed carrier and quad
qaijeng_v37
- 自己编的5种调制信号，music高阶谱分析算法，包括单边带、双边带、载波抑制及四倍频。- Own five modulation signal, music higher order spectral analysis algorithm, Including single sideband, double sideband, suppressed carrier and quadruple.
saonie_V0.3
- 实现串口的数据采集，包括单边带、双边带、载波抑制及四倍频,插值与拟合的matlab实现。- Achieve serial data acquisition, Including single sideband, double sideband, suppressed carrier and quadruple, Interpolation and fitting matlab implementation.
jaohui
- 到达过程是的泊松过程，光纤无线通信系统中传输性能的研究，包括单边带、双边带、载波抑制及四倍频。- Arrival process is a Poisson process, Fiber Transmission wireless communication system performance, Including single sideband, double sideband, suppressed carrier and quadruple.