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code-demo
- HM6264Driver_DS HM6264 RAM的读写驱动程序 S480_Manual_C S480的手动播放范例 （for SACMV26e.lib） SetIOBit SPCE061A 利用C语言进行软件端口位操作范例 ShowsinTable 简易正弦波发生器方案，同时提供全正数的正弦表 SleepTimerWakeup 定时中断唤醒CPU的范例 UARTDemo 使用UART中断方式进行通讯的范例 UARTDouble UART双机通讯范例，采用中断方
m_decoder
- 恢复以曼彻斯特编码格式输入的mdi信号成实际数据并存储在双端口RAM后以中断方式通知DSP读取数据，所需双端口RAM程序可以从相应的FPGA编译系统中产生-A return to the Manchester encoded signal is input into the actual data mdi and stored in the dual-port RAM notify the DSP after the break to read the data, the required du
m_encoder
- 将写入的数据用曼彻斯特码格式从meout口输出，所需内部存储单元可根据所使用不同的FPGA类型由相应的编译软件产生所需双端口RAM模块-The data will be written by Manchester code format from meout port output, the required internal storage unit can be used according to the different types of FPGA Compiler software f
communication
- 51双端口RAM方式的数据通信的c语言例程-51 pairs of data communication port RAM mode of c-language routines
70T633_VHDL
- idt 双口RAN 70t633 VHDL驱动-idt DUAL RAM 70t633 VHDL driver
DoubleRAM
- actel fpga kit 双端口RAM 实验-actel fpga kit dual-port RAM test
ram_fpgavhdl
- fpga vhdl实现一个标准双端口ram，可以作为单端口或者双端口用 -fpga vhdl achieve a standard dual-port ram, can be used as a single port or dual port with a
cpldrealizing-DUALportRAM-vhdl
- 双端口RAM 实现对于RAM的同时读写操作-dualport ram with the VHDL to realize read or write the ram at the same time
asyncfifo
- 异步fifo，使用双端口RAM作为memory-asynchronous fifo
Example-b4-1
- 1. 定制一个双端口RAM，DualPortRAM 2. 在顶层工程中实例化这个RAM 3. 实现这个工程，在Quartus II仿真器中做门级仿真 4. 在ModelSim中对这个工程进行RTL级仿真 -Customize a dual port RAM, DualPortRAM On the top floor of the RAM engineering instantiation To realize the project, in Quartus II simu
Example-b4-1
- 利用quartusII开发软件的宏功能模块调用功能，定制了一个双端口RAM。-Utilize quartusII development software macro function module calls a function to customize a dual-port RAM.
idt723641
- VERILOG双端口驱动IDT的双扣RAM很好用的-VERILOG Twill the IDT dual-port RAM drive good use
IPRAM
- FPGA内置RAM,调用tools里面的IP核，生成一个双口的RAM，用来存储数据。然后可以用SignalTAP II查看波形或者数据。-FPGA built-in RAM, which is called IP core tools to generate a dual port RAM, used to store data. You can then view the waveform or use SignalTAP II data.
modbusScut1023
- 基于开源项目FreeModbus，针对双端口RAM进行代码改造。通过该代码程序，实现上位机PC与下位机DSP实时的实时信息交互。-this project is based on an open source project FreeModbus,which can be applied to dualport RAM.With this project,PC application can launch a realtime communication with DSP controller
HPI-Communication-Design
- 介绍了TMS320VC5402的HPI主机接口原理,以一个简单的通信程序作为例子,详细说明通过HPI 口实现5402芯片内部的16 kB 双端口RAM与AT 89 C51单片机的通信过程. -Introduces the principle of TMS320VC5402 HPI host interface, a simple communication program as an example, a detailed descr iption of the chip to achieve
Example-b4-1
- 1.定制一个双端口RAM，DualPortRAM 2.在顶层工程中实例化这个RAM 3.实现这个工程，在Quartus II仿真器中做门级仿真 在ModelSim中对这个工程进行RTL级仿真-1. Customize a dual-port RAM, DualPortRAM 2. In the top-level project instantiate RAM 3. To achieve this project, do gate-level simulator in Qua
QuartusII_IP_Core
- 以设计双端口RAM为例说明QuartusII中利用免费IP核的设计的详细教程-To design dual-port RAM as an example of the use of a detailed tutorial QuartusII free IP core design
Sunhaibo
- ＰＣＩ9054的读写，其中包括双口ＲＡＭ，以及寄存器的使用-PCI9054 read and write, which includes dual port RAM, as well as the use of registers
dual_ram
- 在ISE中测试双端口RAM的源码，结合DDS可以通过Isim仿真直接测试RAM IP核的使用是否正常。-Dual-port RAM test source code in ISE, the binding DDS RAM IP core can be directly tested whether the use of the normal simulation.
ram_2
- 双端口RAM，可读，可写，用Verilog编写。希望与大神交流，求大神指正。(Dual port RAM, readable and writable, written in Verilog. Hope to communicate with great God, ask God to correct me)