搜索资源列表
FSM_Code
- 一个C++封装的,基于状态转换表设计的有限状态机实现例子-a C Packaging, based on state transition table design Finite State Machine example
FSM的示例程序
- 这是有限状态机的模版事例程序,很有意义。 请斑竹尽快给我下载权限。急。- Please fed as I downloaded to the authority. Urgent.
MazeWalkerMaze
- 用有限状态机实现的迷宫求解。本程序用于画图的是OpenGL.-finite state machine to achieve the maze solving. The procedure for drawing the OpenGL.
FPGA控制AD程序,ADC,DAC转换接口
- FPGA控制AD程序,ADC,DAC转换接口.rar 有限状态机控制AD采样.rar,FPGA control AD procedure
fsm
- 有限状态机工作原理、设计方法、步骤等精要说明-Finite state machine working principle, design method, such as Essentials of steps to explain
Mars
- 有限状态机演示程序,C++编写,界面为MFC制作。-Finite state machine demo program, C++ to prepare, the interface for the production of MFC.
FSM_FTP
- 利用有限状态机实现FTP 文件传输,不错,可以看看,研究一下-The use of finite state machine realization of FTP file transfer, yes, you can look at and study the
AI
- 6中AI算法,包括路径规划与移动技术、有限状态机,脚本技术,群聚技术,遗传算法,神经网络,每个算法中都有例子程序。-6 AI algorithms, including path planning and mobile technology, finite state machines, scr ipting technologies, clustering techniques, genetic algorithms, neural networks, each algorithm, ther
UART
- UART是一种广泛应用于短距离、低速、低成本通信的串行传输接口.由于常用UART芯片比较复杂且移植性差,提出一种采用可编程器件FPGA实现UART的方法, 实现了对UART的模块化设计.首先简要介绍UART的基本特点,然后依据其系统组成设计顶层模块,再采用有限状态机设计接收器模块和发送器模块,所有功能的实现全部采用VHDL进行描述,并用Modelsim软件对所有模块仿真实现.最后将UART的核心功能集成到FPGA上,使整体设计紧凑,小巧,实现的UART功能稳定、可靠. -UART is a wi
DVDT_MORE
- 基于FPGA有限状态机的数据采集系统,实现对高速AD转换的控制。-FPGA-based finite state machine of the data acquisition system for high-speed AD conversion control.
JohnFSM
- java相关的有限状态机的小机器人模拟程序-java-related small finite state machine robot simulation program
state
- verilog HDL下有限状态机(FSM),麻雀虽小,但五脏俱全!值得一看-under the verilog HDL Finite State Machine (FSM), the sparrow may be small, but is a fully-equipped! Worth a visit! !
ktkzxt
- 利用有限状态机描述的空调控制系统,温度状态有过高、过低、正好三种状态,控制方式有升温和制冷两种;设计了温度传感装置-The use of finite state machine described in the air-conditioning control systems, temperature conditions are too high, too low, just three states, the control methods are two kinds of heating
Message-driven_finite_state_machine_framework
- 在Tornade集成开发环境下设计和实现了一种消息驱动有限状态机的框架。本系统封装了VxWorks提供的消息发送机制,增加了消息标识,消息类别等参数;采用自己的软时钟,设置相应的时间超时管理;设置了自己的内存管理机制。-Tornade integrated development environment in the design and implementation of a message-driven finite state machine framework. The system e
calculator
- 自己写的计算器,基于c51单片机写的,用protues完美模拟,原理是有限状态机,呵呵,含有三个版本,能完成基本的四则运算,键盘流出空闲,方便后来者扩展-Write your own calculator, based on c51 microcontroller written by protues perfect simulation, the principle is a finite state machine, Oh, containing three versions, to com
FSM
- 有限状态机设计指导,详细介绍了设计状态机过程中的有关经验,以及各种状态机设计的相互优劣对比-Finite state machine design guidance, details of the design state machine during the relevant experience, as well as various advantages and disadvantages of each state machine design comparison
Verilog-HDL
- 这是关于VERILOG HDL的有限状态机的源码,大家参考参考,应该有好处的。-This is about VERILOG HDL source code for finite state machines, we refer to the reference, it should be good.
C language state machine
- C语言状态机 用状态机原理进行软件设计 摘要:本文描述状态机基础理论,以及运用状态机原理进行软件设计和实现的方法。 关键词:有限状态机 层次状态机 面向对象分析 行为继承(C language state machine)
一段式有限状态机
- 通过找hello结束后,控制led的翻转(After you look for Hello, control the LED flip)
testSta状态机对应代码
- 有限状态机又称有限状态自动机,简称状态机,是表示有限个状态以及在这些状态之间的转移和动作等行为的数学模型。它反映从系统开始到现在时刻的输入变化,转移指示状态变更,并且用必须满足来确使转移发生的条件来描述它;动作是在给定时刻要进行的活动的描述。(Establish basic finite state machine)