搜索资源列表
aes-128_pipelined_encryption
- AES 加密算法 基于流水线设计 成熟IP core-AES encryption algorithm based on pipeline design mature IP core
jiemr480
- 可以获得CPU的缓存大小,流水线数等等30多项CPU的特性-Can get the CPU cache size, number of lines and so on more than 30 characteristics of the CPU
GA_Flow-Shop
- 流水线型车间作业调度问题可以描述如下:n个任务在流水线上进行m个阶段的加工,每一阶段至少有一台机器且至少有一个阶段存在多台机器,并且同一阶段上各机器的处理性能相同,在每一阶段各任务均要完成一道工序,各任务的每道工序可以在相应阶段上的任意一台机器上加工-Pipelined job shop scheduling problem can be described as follows: n tasks for the m-th stage processing on the assembly lin
jspga
- 网上完整的程序,可以完成流水线问题,有点缺陷-You can complete the pipeline issue
1266318
- 可以获得CPU的缓存大小,流水线数等等30多项CPU的特性-Can get the CPU cache size, number of lines and so on more than 30 characteristics of the CPU
fft4_T
- 4点FFT处理器设计,流水线式结构。采用状态机,不停地循环。-4-point FFT processor design, pipelined structure. Using the state machine, keep the cycle.
sime-Genevic
- 遗传算法计算一条流水线作业时间问题的matlab程序代码-Genetic algorithm is a problem of assembly line work time matlab code
PipelineCPU
- 一个用Verilog HDL语言所写的32位MIPS指令系统流水线CPU,含代码工程文件和相关设计说明文档,比较详细。-verilog HDL, 32 MIPS pipeline CPU
xequimemgntsencapsulation
- 遗传算法计算一条流水线作业时间问题的matlab程序代码-Genetic algorithm is a problem of assembly line work time matlab code
Can_chaqacteristacs_bore
- 可以获得CPU的缓存大小,流水线数等等30多项CPU的特性(Can get the CPU cache size, number of lines and so on more than 30 characteristics of the CPU)
pipelined_fft_256_latest.tar
- 一个256流水线结构的FFT实现,用于FPGS实现,xilinix(A 256 pipelined structure of the FFT implementation, for FPGS implementation, xilinix)
BCH_VLSI
- 使用HLS完成BCH编码的运算通路的设计,纯组合逻辑,对于65nm工艺可跑上1GHz。已经组合逻辑分为了多个部分,可在每一个部分之间插流水线。 附上可综合的纯RTL Code以及C++代码,以及Modelsim仿真。 可通过我的优化选项来学习如何优化HLS工具生产的代码。(BCH Encoder realized using HLS tool. Combinational logic.)
DeviceTest
- android 生产测试源码,用于生产时对机器的功能进行流水线般的查看。(Android production test software)
CPU_Verilog
- 此代码完成了流水线CPU的设计。其中有ALU,控制模块,UART等verilog代码。(This code completes the design of pipelined CPU)
um
- 报文数据缓存,用户定义模块,该模块包含五级流水线,其中报文解析模块、报文处理、报文发送等五个子模块(The um word include five small word ,can execute more function)
sdram_16bit_latest.tar
- 这个IP核是一个小型的,简单的SDRAM控制器,用于为16位SDRAM芯片提供32位流水线的二叉树接口。 当访问开放行时,读写可以流水线实现完整的SDRAM总线利用率,但是读写之间的切换需要几个周期。(This IP core is that of a small, simple SDRAM controller used to provide a 32-bit pipelined Wishbone interface to a 16-bit SDRAM chip. When acce
Gegetic
- 遗传算法计算一条流水线作业时间问题的matlab程序代码(Genetic algorithm is a problem of assembly line work time matlab code)
机械手控制
- 机械手控制及应用,工业控制,流水线生产,组装,焊接,等行业(Manipulator control and application, industrial control, assembly line production)
PLC1
- 这是移栽流水线的程序,全自动的,大家可以参考下(This is the process of transplanting lines, fully automatic, we can refer to)
流水线上电脑电源材料清单材料
- 严格的EXCEL材料清单,有名称,型号,封装,数量等信息(A list of various board materials, for reference, a variety of board materials list for reference)