搜索资源列表
vhry
- 频带数字通信中,频带一阶锁相环simulink模型 不错的 很好-Band digital communications, frequency band of first order phase-locked loop simulink model good is very good
theta_calculate
- 利用反正切进行角度计算，可用作DSP上的锁相环-can be used as SPLL on DSP
ordyrnirstgood
- 频带数字通信中,频带一阶锁相环simulink模型 不错的 很好-Band digital communications, frequency band of first order phase-locked loop simulink model good is very good
ADF5355Program
- 对ad5355锁相环芯片的寄存器配置，输出相应的频率-On the ad5355 phase-locked loop chip register configuration，Output the corresponding frequency
DDSRFSPLL
- matlab下的双同步解耦坐标系的锁相环仿真(PLL simulation of double synchronous decoupling coordinate system under Matlab)
dsp2812
- dsp2812官方例程，全部外设都有，SPI，SCI，PWM，定时器，PLL锁相环，亲测，直接能用(DSP2812 official routines, all peripherals have, SPI, SCI, PWM, timer, PLL phase-locked loop, pro test, can be used directly)
ThreePhase_PwmFilter
- 三相PWM整流器并网系统，包括锁相环，坐标变换，解耦控制算法，SPWM算法((Three-phase grid-connected systems, including phase-locked loop, coordinate transformation))
PLL
- PLL锁相环仿真文件，附带解释，完美实现(PLL phase locked loop simulation file, with explanation, perfect realization)
TB31206
- 东芝公司开发的一款锁相环PLL芯片，可以用于频率综合使用。(Toshiba Co developed a PLL PLL chip, can be used for frequency integrated use)
SCRGYJR20150826
- 可控硅逆变，控制。全桥并联谐振，锁相环控制。(this is simulink of thyristor inveter,it include start up,control,and PLL.)
pll_test
- 描述了利用spartan6系列FPGA，实现PLL锁相环的功能代码(Describes the use of spartan6 series FPGA, PLL PLL to achieve the functional code)
ADF4002_PLL
- ADF4002芯片驱动函数库，可用于锁相环电路，其他功能也可参考(ADF4002 chip driver library, can be used for PLL circuit, other functions can also refer to)
ADF4002
- ADF4002源码，c语言编写 ，spi接口，输出稳定的正弦波(ADF4002 source code, c language, spi interface, the output stable sine wave)
本振源模块 - 副本
- 通过修改值控制可以输出35——3.3g的信号，(fang bian de chengxu)
max2871 - STM32F103VET6 - pingpong
- 锁相环max2871乒乓工作方式时的程序设计(programme for the pingpong working style of the PLL max2871)
PLL_D
- 用51单片机控制锁相环PLL输出不同频率的正弦信号(The phase-locked loop PLL is controlled by 51 single-chip microcomputer to output sinusoidal signals of different frequencies)
ADF4351-精简(点频)-资料包+PDF
- 锁相环模块的相关驱动级一个实际应用的例子和相关的文档(The related driver level of the PLL module, an example of practical application and related documents)
020256
- 仿真锁相环系统,可以仿真锁定时间,不同的环路带宽对系统的非理想特性！(Phase-locked loop simulation system, simulation can lock time, different loop bandwidth non-ideal characteristics of the system.)
verddjgital
- 频带数字通信中,频带一阶锁相环simulink模型 不错的 很好(Band digital communications, frequency band of first order phase-locked loop simulink model good is very good)
SPLL_DSOGI
- 模拟锁定电网角度，参考价值还是不错的，证实可用。(Analog locking grid angle, the reference value is good, confirmed to be available.)