搜索资源列表
vmm1.2.2
- synopsys vmm 最新源码，功能更加强大，对IC验证加强支持-synopsys vmm system verilog source code
onntounch
- 新思触摸键相关的技术资料，包括触摸按键调试程序demo，原厂demo,原理图PCB等技术资料，新思公司的触摸按键都类似，比较全面-Synopsys touch key related technologies, including touch keys debugger demo, the original demo, PCB schematics and other technical information, Synopsys touch keys are similar, more com
OpenRISC
- 一个开放的risc，已应用到实际中，可以借鉴的不少，大家-an open RISC, has been applied to practice, we can draw a lot, we look at
wavele_realizing_using_matlab
- 小波分析理论与MATLABR2007实现一书的原代码，飞思科技出的.不错的。-Wavelet analysis theory and the realization of a book MATLABR2007 the original code, Synopsys fly out. Good.
Reuse-Methodology-Manual-Third-Edition
- 进行SOC/IP 设计以及可重用设计的宝典书籍！是synopsys的一位牛牛写的！ 主要以mentor和synopssy的设计工具为流程，讲述了SOC/IP可重用设计，验证设计的基本方法。 -For SOC/IP design and reusable design book books! A synopsys Niuniu is written! To mentor and synopssy the main design tools for the process, about the
StaticTimingAnalysis
- 静态时序分析（Static Timing Analysis简称STA）经由完整的分析方式判断IC是否能够在使用者的时序环境下正常工作，对确保IC质量之课题，提供一个不错的解决方案。然而，对于许多IC设计者而言，STA是个既熟悉却又陌生的名词。本文将力求以简单叙述及图例说明的方式，对STA的基础概念及其在IC设计流程中的应用做详尽的介绍。-Static timing analysis (Static Timing Analysis referred to as STA) through a com
2
- RFID系统的IEEE的文章，安全协议，认证- In this paper, we first propose a cryptographic authentication protocol which meets the privacy protection for tag bearers, and then a digital Codec for RFID tag is designed based on the protocol. The protocol w
vmm-1.0.1
- vmm-1.0.1.rar synopsys vmm systemverilog code-vmm-1.0.1.rar synopsys vmm systemverilog code
VMM_Hardware_Abstraction_Layer_User_Guide
- synopsys VMM Hardware Abstraction Layer User Guide
SystemVerilogAssertion
- SystemVerilog Assertion的应用例子。例子均在Synopsys VCS环境下编译通过。-The uploaded files are examples of Systemverilog Assertions. All of the codes are compiled successfully in Synopsys VCS environment.
hspice_models_quickref
- The Synopsys Discrete Device Library is a set of models of discrete components for use with HSPICE and Star-SimXT circuit simulators. It includes Diodes, FETs, MACROs (op-amps and comparators), Burr Brown, PMI, Signetics, and TI.
vcs-fang-zheng-2
- VCS-verilog compiled simulator是synopsys公司的产品.其仿真速度相当快,而且支持多种调用方式 使用的步骤和modelsim类似,都要先做编译,在调用仿真.-VCS-verilog compiled simulator is synopsys company' s products. The simulation very fast, and supports multiple call mode use similar steps and models
LowPpowerPMethodologyPPmanual
- 低功耗的设计资料, ARM和Synopsys的经验-low power design resource, the experience of ARM and Synopsys
VCSWorkshopLab_Database.tar
- SYNOPSYS公司自带的专供VCS软件的学习代码-SYNOPSYS VCS exclusively for the company' s own software code to learn
iccompiler_d-2010.03_install
- Synopsys IC Compiler document file-Synopsys IC Compiler document file..
Synopsys_90nm_lib_course-OpenSPARC
- 开源可扩充处理器架构.源代码Synopsys_90nm_lib_course-OpenSPARC_labs_final_041509-Synopsys 90nm lib course-OpenSPARC labs final 041509
vcs_simulation_mannual(Edition2)
- VCS-verilog compiled simulator是synopsys公司的产品,这是VCS得技术手册-a technical mannual of vcs
synopsys_dw_pdf
- some pdf about synopsys design ware i2c timer uart
Mdiaanjiio
- 电机驱动driver电路 提供了H桥电路设计的几点思 -Motor drive circuit driver providess a H bridge circuit design Synopsys