搜索资源列表
synopsys
- pbm.h: PCI bus module pseudo driver software state.
sun3_scsi_vme
- Synopsys DesignWare APB GPIO controller.
S3508_MTK
- 新思S3508A在MT6589平台驱动，已经调试OK，什么都不需要修改。-Synopsys S3508A in the MT6589 platform-driven, has been debugging OK, nothing needs to be modified.
dw_mmc
- Synopsys DesignWare Multimedia Card Interface driver.
xdlh_tlp_gen_32b
- 详细的写出了PCIE一个TLP包头如何生成，采用synopsys公司的资料-use the synopsys INC. data write how to generate a TLP packet.
hspice
- Synopsys Hspice code for nand gate characteristics and five coupled lines delay calculation using w-element method
GCD-CALCULATOR
- GCD CALCULATOR (ESD book figure 2.11) Weijun Zhang, 04/2001 we can put all the components in one document(gcd2.vhd) or put them in separate files this is the example of RT level modeling (FSM + DataPath) the code is synthesize
ic_synthesis_based_ARM_labs
- synopsys 开发的针对cortex-m0入门kit的实现实验 -lab form synopsys for cortex_m system design kit synthesis
cortex_m0_mcu_system_synopsys
- cortex m0 mcu system synopsys verilog code
dc
- 使用synopsys的DESIGN COMPILER逻辑综合工具，流程通用脚本-the scr ipts of DESIGN COMPILER for synthesis
VCS
- vcs介绍使用方法 介绍如何具体使用synopsys公司的软件(VCs describes the use of the method)
verilog add4
- 分两部分，基于verilog的四位和八位加法器设计，用synopsys的VCS仿真工具进行功能仿真，掌握基本的makefile编写以及linux操作。(Divided into two parts, four and eight adder based on verilog design, function simulation with synopsys VCS simulation tools, master the basic makefile writing and Linux.)
1
- curcuit simulation in Hspice
SystemVerilog_Synopsys
- systemverilog introduction by synopsys
DC Synopsys Workshop
- Design Compiler 工作台教程文档 操作手册(Design Compiler Workshop Tutorial Document Operation Manual)