搜索资源列表
FPGAPCMOS
- 图像实时采集原理及程序，详细的verilog代码-Real-time image acquisition principles and procedures
PBDC
- Verilog is a one of the famous Hardware Descr iptive Languages (HDL). (VHDL is the other one). Verilog langauage syntax very well matches with C language syntax. This is big advantage in learning Verilog. Logic operators, data types, loops are simila
PICTURE
- 图像的二值化处理，使用lena图像，使用verilog语言，代码有详细的说明，适合verilog学习-Binary image processing, the use of lena image, using verilog language, code has detailed instructions for learning verilog
grayscale
- 灰階(gray-scale)圖像處理(60*60 pixel)controller控制各個程式的地址以及開關，input_mem將資料讀進記憶體，grayscale將讀取資料像素的亮度以數值來表示，將24bit的 像素化成四個8bit的值輸出。接著進入sobel，在此將前面的四個值乘上1或-1個別的相加，得出新的四個值，輸入進shiftcase進行threshold的判斷，大於threshold則表現出白色(255)，小於threshold則表現出黑色(0)，最後將結果存入記憶體out_mem。
revolve
- 实现将图像顺时针旋转90度的verilog代码，代码简洁易懂-Implementation will rotate the image 90 degrees clockwise verilog code, the code is easy to read
DWT_xilinx
- Dwt(Discrete wavelet transform). verilog code
VGA_Ctrl
- AD7123的verilog显示控制，符合AD7123芯片的接口时序-The verilog AD7123 display control, in accordance with AD7123 chip interface timing
vga_stripes_top
- VGA彩条显示,分辨率800*600,使用Verilog显示间隔可设置的红绿条纹,使用工具为xlinx ise.-VGA color display with a resolution of 800* 600, the use of red and green stripes Verilog display interval can be set using tools xlinx ise.
color-interpolation
- 用verilog实现的颜色插值，有带仿真-Color interpolation using verilog realize there with simulation
ADV7123_BOARD
- 基于FPGA的摄像头读入，用到nios软核-verilog HDL
dct2d
- 研究生课程 ： 来源于Xilinx公司，二维DCT变换代码。-Graduate courses: from Xilinx, 2D DCT function implementation verilog code.
pll
- PLL 锁相环verilog程序 可以直接使用-The PLL can be used directly good use
Histogram-equalization-of-FPGA
- 利用硬件语言verilog实现直方图均衡化-Histogram equalization of FPGA
sobel_edge_det
- 这是基于verilog语言的sobel检测的硬件语言设计，简单可用。-sobel verilog
sobel
- 在FPGA中，采用verilog HDL语言实现图像处理算法sobel，仿真实验通过-In the FPGA using verilog HDL language image processing algorithms sobel, simulation experiment
liangdu
- 通过Verilog程序在FPGA上实现按键切换的亮度变化。包含源代码和原理图-Verilog program achieved through changes in brightness button to switch on the FPGA. Contains the source code and schematics
code-code
- spi，uart等接口的verilog代码和说明文档，能帮助大家了解总线的功能。-spi, uart verilog code and documentation, such as interfaces, can help you understand the function of the bus.
uv_sep_cr
- 运用CatMoor算法原型的YUV444转YUV422的Verilog源码-YUV444 conver to YUV422 using Catmoor Agrithm
pal
- FPGA产生PAL-D的VHDL和Verilog代码。-The code is used to generate the sequence of PAL with FPGA in VHDL and Verilog
VIP_RGB_TO_YCbCr
- 色彩空间转 verilog 实现RGB_TO_YCbCr-Color Space turn verilog realization RGB_TO_YCbCr