搜索资源列表
marketplace
- 网络购物中心由前台管理和后台网站管理两部分组成。 前台管理 该部分主要包括商品展台、购物车、收银台、会员管理、商城公告及订单查询、商品查询等功能。 后台管理 该部分主要对商城内的一些基础数据进行有效管理，包括后台登录、商品设置、会员设置、订单设置、后台管理员设置、友情链接设置、公告设置等功能。-Online shopping centers managed by the front and back-office site management of two parts.
Multiplier
- 使用三种不同结构（加法树、查找表、Booth算法）实现的乘法器，带有测试文件。-Use of three different structures (addition tree, look-up table, Booth algorithm) to achieve the multiplier, with testbench files.
a
- booth multiplier vhdl code
multiplier1
- vhdl for multiplier and booth multiplier encoder table
multiplier__tb
- paralel multiplier with booth coding in verilog
Mul16
- 16位高速乘法器,采用booth编码，华莱士压缩，超前进位加法器求和完成-16-bits Multiplier
san
- this presentation deals with modified booth algorithm
Booth_Multiplier_8bit_Radix_4_With_12bit_Adder_Ko
- verilog code for Booth Multiplier 8-bit Radix 4
booth1.dir
- booth multiplier in max-plus 10.2
multiplier-
- 模拟计算机中乘法器的运行过程，用到了Booth算法-The operation of the computer simulation of the multiplier process, use of the Booth algorithm
multiplier
- this document describe a 8 * 8 bits mutiplier with vhdl using booth algorithm and shown all parts of implementing this ip by ise software
newalgBooth
- modefied booth encoder complete algorithm
34105908-Multipliers-Using-Vhdl
- ABSTRACT: Low power consumption and smaller area are some of the most important criteria for the fabrication of DSP systems and high performance systems. Optimizing the speed and area of the multiplier is a major design issue. However, area and
add_2x32_v1
- 2*32乘法器设计，只是部分Booth乘法器的设计，相关的后面部分将在需要时陆续上传。-design of an 2*32Multiplier
95637012Multiplier
- 一种可以完成16位有符号／无符号二进制数乘法的乘法器。该乘法器采用了改进的booth算法，简化了部分积的符号扩展，采用Wallace树和超前进位加法器来进一步提高电路的运算速度。本乘法器可以作为嵌入式CPU内核的乘法单元，整个设计用VHDL语言实现。- This file contains all the entity-architectures for a complete-- k-bit x k-bit Booth multiplier.-- the design makes use of
New-folder
- VHDL codes for booth , nco and some more
multiplier
- 参数可配置的sequential 乘法器和booth 乘法器-verilog source code with configurable parameters for sequential multiplier and booth multiplier
booth_multiplier
- This source code makes 8 X 8 booth multiplier and it is coded in Velilog HDL.
booth_multiplier
- Booth Multiplier Radix-2
The-Booth-Tolls-for-Thee
- 细胞自动机的matlab代码，数学中国上下载的，供数学建模的参考。-Cellular automata matlab code, mathematics Chinese to download for reference, mathematical modeling.