搜索资源列表
emsx_top_dev_20080712
- VHDL, c and asm source codes of the One-Chip-MSX, a fpga implementation of the MSX computer. Versions for the ocm and de1 fpga boards.
DE1_UserManual_v1018
- 介绍DE1的基本概念及一些使用的说明及管脚之类的！-Introduce the basic concepts of DE1 and some use of descr iptions and pin-like!
DE1_pin_assignments_TFT_NEC6446
- de1 assignments for nec6446 tft vga display
Audio_Bit_Counter
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
Audio_In_Deserializer
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
Audio_Out_Serializer
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
Avalon_Audio
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
Clock_Edge
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
SYNC_FIFO
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
IICbus
- 基于nios ii 控制altera de1 开发板上iic总线实现与at24c02通信-Based on nios ii controlled altera de1 Development Board iic bus for communication with the at24c02
video_encoder_board_att
- This the artwork for a board that connects a video encoder chip to a Altera DE1 board (or any other) via a IDE cable-This is the artwork for a board that connects a video encoder chip to a Altera DE1 board (or any other) via a IDE cable
video_board_schemtic1
- this the schemtic for hooking up a video encoding chip (SAA7121H) to a IDE connector so it can connect to a DE1 FPGA board or any other you fancy-this is the schemtic for hooking up a video encoding chip (SAA7121H) to a IDE connector so it can connec
de1
- the first demo for matlab !-demo for matlab !
image_download_demo(valid20091129)
- DE1上实现数码相框的verilog代码，以及实现方式-DE1 digital photo frame to achieve the verilog code, and Realization
TRDB_LCM
- DE1/DE2的TRDB_LCM驱动Verilog源代码。-DE1/DE2 of TRDB_LCM drive Verilog source code.
DE1_UserManual_v1017
- DE1学习手册，包括配置，引脚的说明以及使用方法等-DE1 learning manuals, including configuration, pin descr iption and the use of methods
Zet-1.1.2
- 這是一個開放的執行情況等廣泛使用的IA - 32架構（一般稱為 x86）的。這個項目是很新，但它可以合成一個可配置的設備，如FPGA或CPLD的，或作出一個定制的ASIC。兩個 FPGA板目前支持：賽靈思 ML403和Altera DE1。 玩沙丘2在MS - DOS平台上運行的中興通訊。看到一些其他的圖片。 玩沙丘2在MS - DOS平台上運行的中興通訊。看到一些其他的圖片。 這個項目是很複雜的，是在一個非常早期的發展階段。只有16位的一部分（即該80186分之8086）的支持，看
keyboard_PS2
- This program provides the communication between keyboard PS2 with DE1 KIT
verilog
- 利用verilog HDL编程驱动7段译码显示器，采用一位8进制方式，已在DE1开发板上得到验证。-Using verilog HDL programming display driver 7 of decoding, using an 8 hex mode, has been validated in DE1 Development Board.
DE1_NIOS
- 用DE1试验箱实现的VGA调试程序，效果不错，分享下！-Chamber to achieve the VGA with DE1 debugger, well, sharing the next!