搜索资源列表
常用视频文件处理工具汇总
- 常用视频文件处理工具汇总，包含ts、mp4、flv等的mux和demux，mp4的分析工具，flv的分析工具
多路选择器
- 由3-mux和4-mux组成12-mux的verilog编码
Capcha
- he reCAPTCHA PHP Library provides a simple way to place a CAPTCHA on your PHP website, helping you stop bots from abusing it. The library wraps the reCAPTCHA API. To use reCAPTCHA with PHP, you can download reCAPTCHA PHP library. You will only need o
mux4_1.数字系统设计的编程
- 数字系统设计的编程，实现四选一的多路选择器，用ｖｅｒｉｌｏｇ实现。,The design of digital systems programming, to achieve the election of the four MUX, with the realization of verilog.
GsmMux.rar
- 该源码是针对支持Mux技术的手机Modem的驱动，使用此驱动，你的手机在上网的同时还可以响应AT指令；本驱动支持Motorola的G24和大唐的TD模块中，在多款ARM（如Davinci的DM644x，XScale的ixp42x）得到严正,The source is Mux technical support phone Modem driver, use this drive, your cell phone in the Internet at the same time can also
DPLL(VHDL).rar
- 使用VHDL语言进行的数字锁相环的设计，里面有相关的文件，可以使用MUX+PLUS打开,The use of VHDL language of digital phase-locked loop design, there are relevant documents, you can use MUX+ PLUS Open
avi.rar
- avi文件格式，将avi格式视频分离成视频流和音频流，很好的学习资料,avi file format, avi format video will be separated into video stream and audio stream, a very good learning materials
muxbind
- 这个源码主要是用来讲解vxwork中关于mux的一个简单编程-This source is mainly used to explain vxwork on mux a simple programming
zDIFxCmd
- 驱动安装程序，调用DIFxAPI.dll进行安装驱动 安装命令: .\difxcmd.exe /i "Mux-Bus\VIA_USB_BusEnum.inf" 4 16 卸载命令 .\difxcmd.exe /u "Modem\VIA_USB_MODEM.inf" 4 32-Driver install program, use DIFxAPI.dll
pingpong 多路选择器实现
- 实现了乒乓操作，用多路选择器来实现，简单易懂。-Achieved a ping-pong operation, With the MUX to achieve， easy to understand
123654vhaing
- 八音自动播放电子琴设计 vhdl源码，文件内有具体注释 [VHDL-XILINX-EXAMPLE26.rar] - [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9- -Octave electronic keyboard play aut
avi-mux_gui
- AVI MKV 文件格式说明，新手可以下下来看看。英文文档-document about avi mux
ACCE
- selects the mux channel and configures the MAX197 for second write pulse, written with ACQMOD = 0, termi- either unipolar or bipolar input range. A write pulse (WR nates acquisition and starts conversion on WR°Os risin + CS) can either start
ASM-TEST
- selects the mux channel and configures the MAX197 for second write pulse, written with ACQMOD = 0, termi- either unipolar or bipolar input range. A write pulse (WR nates acquisition and starts conversion on WR°Os risin + CS) can either start
ADC08090
- selects the mux channel and configures the MAX197 for second write pulse, written with ACQMOD = 0, termi- either unipolar or bipolar input range. A write pulse (WR nates acquisition and starts conversion on WR°Os risin is restarted. The ACQ
CDMA20001X-data
- DMA20001X提供了比IS95B更为丰富的数据业务，SCH数据速率可以从9.6kpbs到153.6kbps不等。吞吐量是衡量数据业务性能优劣的重要指标之一，对于网络的每一层（物理层、SDU层、Mux层、RLP层、PPP层、TCP/IP层、应用层）都有相应的吞吐量，虽然在物理层能够提供最大数据业务吞吐量为153.6+9.6＝163.2kpbs，但是由于层间复用，在数据包中增加了数据头，使得经过多层复用以后数据包长度变长；另外由于采用了RLP重传机制，以及RLP层应答延时的引入，使得一个终端用户
chap12
- 16个常用HDL编码打包上传 包括记数器，多路选择器，全加/半加器等，均通过modsim验证-16 commonly used HDL coding package upload includes counter, MUX, all add/semi-add, etc., are adopted to verify modsim
Mars_EP1C6F_fundemantal_demo
- FPGA 开发板源码。芯片为Mars EP1C6F.VHDL语言。可实现一些基本的功能。如乘法器、加法器、多路选择器等。-FPGA development board source. Chips for the Mars EP1C6F.VHDL language. Can achieve some of the basic functions. Such as multiplier, adder, such as MUX.
Mars_EP1C6F_Fundermental_demo(Verilog)
- FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。-FPGA development board supporting Verilog HDL code. Chips for the Mars EP1C6F. Are the basic source experiment. Including the adder, subtraction, and multiplier, such as MUX.