搜索资源列表
lab5
- 撰寫一個 1 bit 的 2-to-1 MUX VHDL code -Write a 1 bit of 2-to-1 MUX VHDL code
mux_choose
- 这是cpld，EPM240多路选择器程序，希望与大家分享-This is cpld, EPM240 MUX program, hoping to share with you
pricisetimer
- 精确定时器,可实现微秒级别的分辨,在数据采集同步等过程中很有用-it is a pricise timer with micro second precise,which is used in data sampling and some other mux process
mux
- vhdl code for multiplexer and detemines how multiplexer works
FSK
- matlab simulation for freq division mux
mux1
- mux one hwich is teh best knwo progerma i n the workdl and ist is the
fsmmoore
- vhdl CODE FOR moore MODEL AND mux
gprs
- linux中ppp拨号上网的文件，没有实现MUX-linux dial-in ppp files, there is no realization of MUX
scanner
- 扫描显示译码控制部分用一个频率1KHz的信号扫描一个多路选择器，实现对六位已经锁存的计数结果的扫描输出-Scan revealed a decoding control part of the signal with a frequency of 1KHz scan more than one MUX to achieve a count of six has been the results of the scan latch output
Time.Multiplexed.7Seg.Watch
- Proteus simulation showing how to implement digital clock with multiplexed 7-segments displays using MUX and decoders.
Desktop
- 用verilog HDL编写的多路选择器的代码，包括一部分延迟-Prepared using verilog HDL code MUX, including part of the delay
mux
- 用case描述的 四选一 数据选择器短小精湛初学者必看-With the case described in four short selection of a data selector superb must-see for beginners
verilogcode
- Verilog语言实现的多路选择器和移位寄存器的源代码.-Verilog language implementation of MUX and the shift register the source code.
mux4x1
- mux 4x1 designed by me in fpga adv pro
hex_decode
- hex en circuito de 7 displays para mux
analog_mux
- analog device mux product
muxer_avi
- mplayer-1.0rc2的,muxer_avi.c -muxer_avi
MuxDemux_E1_E3
- E3 -Mux / Demux - Multiplexer of 16 E1 Channels-E3 -Mux / Demux - Multiplexer of 16 E1 Channels
mux
- 本例实现的功能是一个16位的乘法器，并增加了仿真代码-In this case the function is to achieve a 16-bit multiplier, and to increase the simulation code
SRAM_interface
- PSRAM 和flash接口的verilog实现。-Numonyx M18 SCSP StrataFlash with PSRAM interface ( AD-Mux)。