搜索资源列表
xilinx_pci
- PCI support for Xilinx plbv46_pci soft-core which can be used on Xilinx Virtex ML410 ML510 boards.
DDR-SDRAM-Controller
- DDR SDRAM控制器verilog代码及中文说明文档-DDR SDRAM Controller Using Virtex-5 FPGA Devices
ADC10D1000_1500RB-Users-Guide-rev1p2
- 高速AD,ADC10D1000,Virtex FPGA,10位，双路1.01.5GSPS，单路2.03.0GSPS ADC。-High speed AD, ADC10D1000, FPGA Virtex, 10 bit, dual path 1.01.5GSPS, single path ADC 2.03.0GSPS.
DSP-with-FPGAs
- Field-programmable gate arrays (FPGAs) are on the verge of revolutionizing digital signal processing in the manner that programmable digital signal processors (PDSPs) did nearly two decades ago. Many front-end digital signal processing (DSP) algo
xapp223
- UART Receiver with internal 16-byte buffer and UART Transmitter with internal 16-byte buffer for Virtex, Virtex-E and Spartan-II FPGAs-UART Receiver with internal 16-byte buffer and UART Transmitter with internal 16-byte buf
ug195
- 这个文档是关于xilinx virtex-5 FPGA板的封装和管脚定义文件，对于使用v5 有很大的帮助-This document is package and pin definitions files about xilinx virtex-5 FPGA board for use v5 great help
lcd
- 采用Xilinx公司的Virtex-5芯片实现lcd程序-Using Xilinx' s Virtex-5 chip lcd procedure
proceduharbrocedural
- xilinx virtex constraint 通过Winsock控件建立的客户,服务器文件传输程序-Xilinx virtex constraint by Winsock control to establish client, server file transfer program
wkether
- xilinx virtex fpga 这是一个用来检测局域网是否正常的程序的源代码-Xilinx virtex fpga whether this is a used to detect local area network (LAN) normal program source code
ptmi
- xilinx virtex constraint 通过Winsock控件建立的客户,服务器文件传输程序-Xilinx virtex constraint by Winsock control to establish client, server file transfer program
nttwork
- xilinx virtex fpga 这是一个用来检测局域网是否正常的程序的源代码-Xilinx virtex fpga whether this is a used to detect local area network (LAN) normal program source code
ukwvf
- xilinx virtex fpga 这是一个用来检测局域网是否正常的程序的源代码(Xilinx virtex fpga whether this is a used to detect local area network (LAN) normal program source code)
pg023_v7_pcie_gen3
- Virtex-7 FPGA Gen3 Integrated Block for PCI Express v4.2
ddr_sdram
- 包含ddr_sdr_conf_pkg.vhd，reset.vhd，ddr_dcm.vhd，user_if.vhd，ddr_sdram.vhd，Mt46v16m16.vhd以及仿真TB文件；设计采用Virtex ii系列芯片，DDR_SDRAM型号为Mt46v16m16，可用于进行DDR控制的初步学习使用；通过细致了解并进行逻辑控制，可深入理解DDR芯片内部构造； 支持133MHz系统时钟频率，突发长度为2，可进行读、写、NOP、激活、自刷新配置、预充电以及各ROW/BANK的激活改变等动作，较
Coding Files
- Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double
DSP48E1_ComplexMul
- This module does Complex multiplication based on Xilinx DSP48E1 dsp block. Proved on xilinx Virtex 6 Devices
virtex5_hdl
- Virtex-5 Libraries Guide for HDL Designs
xapp1100_multi boot with virtex5
- multi boot with xilinx virtex-5
DWT_verilog-code
- 图像压缩是图像处理中的一个重要课题，在减少图像尺寸以实时传输和存储方面起着非常重要的作用。许多标准推荐使用DWT进行图像压缩。DWT的计算复杂度对基于DWT的图像压缩算法的实时使用提出了重大挑战。在本文中，我们提出了一种改进的提升方案来计算近似和详细的DWT系数。修正的方程使用右移运算符和6位乘法器。计算中的层级减少到一个，从而最小化延迟和增加吞吐量。ViTEX-5 FPGA上实现的设计工作在180 MHz，功耗小于1W的功率。该设计占用了FPGA上不到1的LUT资源。所开发的体系结构适合于FP